src/security/tpm: query recovery mode from Cr50

On the Sarien/Arcada platforms, the EC is not trusted to provide
the state of the ESC+REFRESH+PWR recovery combination. On these
platforms the Cr50 latches the state of REFRESH+PWR for use as the
recovery mode key combination.

BUG=b:122715254
BRANCH=none
TEST=Verify recovery mode screen shown after pressing REFRESH+PWR
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ie3ce519956f916023c8c52f1d11fa93331f52f3c
Reviewed-on: https://review.coreboot.org/c/30929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 31 insertions, 0 deletions

diff --git a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
index 49ac5e8979..d8b3097962 100644
--- a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
+++ b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
@@ -273,6 +273,9 @@ static int marshal_cr50_vendor_command(struct obuf *ob, void *command_body)
 		rc |= obuf_write_be16(ob, sub_command[0]);
 		rc |= obuf_write_be16(ob, sub_command[1]);
 		break;
+	case TPM2_CR50_SUB_CMD_GET_REC_BTN:
+		rc |= obuf_write_be16(ob, *sub_command);
+		break;
 	default:
 		/* Unsupported subcommand. */
 		printk(BIOS_WARNING, "Unsupported cr50 subcommand: 0x%04x\n",
@@ -473,6 +476,8 @@ static int unmarshal_vendor_command(struct ibuf *ib,
 	case TPM2_CR50_SUB_CMD_TURN_UPDATE_ON:
 		return ibuf_read_be8(ib, &vcr->num_restored_headers);
 		break;
+	case TPM2_CR50_SUB_CMD_GET_REC_BTN:
+		return ibuf_read_be8(ib, &vcr->recovery_button_state);
 	default:
 		printk(BIOS_ERR,
 		       "%s:%d - unsupported vendor command %#04x!\n",
diff --git a/src/security/tpm/tss/tcg-2.0/tss_structures.h b/src/security/tpm/tss/tcg-2.0/tss_structures.h
index 2bac6337e4..6952169108 100644
--- a/src/security/tpm/tss/tcg-2.0/tss_structures.h
+++ b/src/security/tpm/tss/tcg-2.0/tss_structures.h
@@ -297,6 +297,7 @@ struct vendor_command_response {
 	uint16_t vc_subcommand;
 	union {
 		uint8_t num_restored_headers;
+		uint8_t recovery_button_state;
 	};
 };
 
diff --git a/src/security/tpm/tss/vendor/cr50/cr50.c b/src/security/tpm/tss/vendor/cr50/cr50.c
index 90f796379c..450ad97fe5 100644
--- a/src/security/tpm/tss/vendor/cr50/cr50.c
+++ b/src/security/tpm/tss/vendor/cr50/cr50.c
@@ -52,3 +52,19 @@ uint32_t tlcl_cr50_enable_update(uint16_t timeout_ms,
 	*num_restored_headers = response->vcr.num_restored_headers;
 	return TPM_SUCCESS;
 }
+
+uint32_t tlcl_cr50_get_recovery_button(uint8_t *recovery_button_state)
+{
+	struct tpm2_response *response;
+	uint16_t sub_command = TPM2_CR50_SUB_CMD_GET_REC_BTN;
+
+	printk(BIOS_INFO, "Checking cr50 for recovery request\n");
+
+	response = tpm_process_command(TPM2_CR50_VENDOR_COMMAND, &sub_command);
+
+	if (!response || response->hdr.tpm_code)
+		return TPM_E_INTERNAL_INCONSISTENCY;
+
+	*recovery_button_state = response->vcr.recovery_button_state;
+	return TPM_SUCCESS;
+}
diff --git a/src/security/tpm/tss/vendor/cr50/cr50.h b/src/security/tpm/tss/vendor/cr50/cr50.h
index 9bf3bd5f79..a1ab539c07 100644
--- a/src/security/tpm/tss/vendor/cr50/cr50.h
+++ b/src/security/tpm/tss/vendor/cr50/cr50.h
@@ -25,6 +25,7 @@
 #define TPM2_CR50_VENDOR_COMMAND ((TPM_CC)(TPM_CC_VENDOR_BIT_MASK | 0))
 #define TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS (21)
 #define TPM2_CR50_SUB_CMD_TURN_UPDATE_ON (24)
+#define TPM2_CR50_SUB_CMD_GET_REC_BTN (29)
 
 /**
  * CR50 specific tpm command to enable nvmem commits before internal timeout
@@ -44,4 +45,12 @@ uint32_t tlcl_cr50_enable_nvcommits(void);
 uint32_t tlcl_cr50_enable_update(uint16_t timeout_ms,
 				 uint8_t *num_restored_headers);
 
+/**
+ * CR50 specific tpm command to get the latched state of the recovery button.
+ *
+ * Return value indicates success or failure of accessing the TPM; in case of
+ * success the recovery button state is saved in recovery_button_state.
+ */
+uint32_t tlcl_cr50_get_recovery_button(uint8_t *recovery_button_state);
+
 #endif /* CR50_TSS_STRUCTURES_H_ */