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authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-10-26 18:45:29 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-10-28 12:26:44 +0000
commitd825e479bd687532ff741691269da0fd4641977d (patch)
tree31dab029b332f203fab4a401a2b9146f8a6ff804
parent3a15fd162147e4a173a963919f6ca0f60515b8f1 (diff)
mb/google/brask/variants/moli: keep SAGV disable
Since there is not too many low power requirement for moli and it is doing FSI firmware qual, so it is not critical to enable the SAGV and keep SAGV disable. BUG=b:254600066 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Reviewed-on: https://review.coreboot.org/c/coreboot/+/68898 Reviewed-by: Zhuohao Lee <zhuohao@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 5612b6ef71..2d35e14112 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -14,7 +14,6 @@ fw_config
end
end
chip soc/intel/alderlake
- register "sagv" = "SaGv_Enabled"
# Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2
register "ddi_ports_config" = "{
[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,