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authorWon Chung <wonchung@google.com>2023-05-31 20:47:02 +0000
committerNick Vaccaro <nvaccaro@google.com>2023-06-07 20:06:54 +0000
commitd6a17e22a31ecd350bc2ea69906b64c60e6e348d (patch)
tree6b2912537f36b302872bb1a7b7d9edda6444490a
parent022c4a490c7af97e7b31636152c8da3464db0056 (diff)
mb/google/brya/var/redrix: Add new GFX device with custom _PLD
Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot BRANCH=firmware-brya-14505.B Change-Id: Ia083617c58d6b7ebc108e07e29a1c8061580eae5 Signed-off-by: Won Chung <wonchung@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/mainboard/google/brya/variants/redrix/overridetree.cb28
-rw-r--r--src/mainboard/google/brya/variants/redrix4es/overridetree.cb28
2 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index f8619c9312..cdea07141d 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -98,6 +98,7 @@ chip soc/intel/alderlake
device ref igpu on
chip drivers/gfx/generic
register "device_count" = "1"
+ # DDIA for eDP
register "device[0].name" = ""LCD""
# Use ChromeOS privacy screen _HID
register "device[0].hid" = ""GOOG0010""
@@ -109,6 +110,33 @@ chip soc/intel/alderlake
probe EPS PRIVACY_SCREEN
end
end
+ chip drivers/gfx/generic
+ register "device_count" = "1"
+ # DDIA for eDP
+ register "device[0].name" = ""LCD""
+ device generic 0 on
+ probe EPS PRIVACY_SCREEN_ABSENT
+ end
+ end
+ chip drivers/gfx/generic
+ register "device_count" = "5"
+ # eDP already added, so skipped
+ # DDIB for HDMI
+ register "device[0].name" = ""DD01""
+ # TCP0 (DP-1) for port C0
+ register "device[1].name" = ""DD02""
+ register "device[1].use_pld" = "true"
+ register "device[1].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ # TCP1 (DP-2) unused
+ register "device[2].name" = ""DD03""
+ # TCP2 (DP-3) for port C2
+ register "device[3].name" = ""DD04""
+ register "device[3].use_pld" = "true"
+ register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ # TCP3 (DP-4) unused
+ register "device[4].name" = ""DD05""
+ device generic 0 on end
+ end
end # Integrated Graphics Device
device ref dtt on
chip drivers/intel/dptf
diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
index 81a808fa5b..37ddbc70b5 100644
--- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
@@ -84,6 +84,7 @@ chip soc/intel/alderlake
device ref igpu on
chip drivers/gfx/generic
register "device_count" = "1"
+ # DDIA for eDP
register "device[0].name" = ""LCD""
# Use ChromeOS privacy screen _HID
register "device[0].hid" = ""GOOG0010""
@@ -95,6 +96,33 @@ chip soc/intel/alderlake
probe EPS PRIVACY_SCREEN
end
end
+ chip drivers/gfx/generic
+ register "device_count" = "1"
+ # DDIA for eDP
+ register "device[0].name" = ""LCD""
+ device generic 0 on
+ probe EPS PRIVACY_SCREEN_ABSENT
+ end
+ end
+ chip drivers/gfx/generic
+ register "device_count" = "5"
+ # eDP already added, so skipped
+ # DDIB for HDMI
+ register "device[0].name" = ""DD01""
+ # TCP0 (DP-1) for port C0
+ register "device[1].name" = ""DD02""
+ register "device[1].use_pld" = "true"
+ register "device[1].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ # TCP1 (DP-2) unused
+ register "device[2].name" = ""DD03""
+ # TCP2 (DP-3) for port C2
+ register "device[3].name" = ""DD04""
+ register "device[3].use_pld" = "true"
+ register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ # TCP3 (DP-4) unused
+ register "device[4].name" = ""DD05""
+ device generic 0 on end
+ end
end # Integrated Graphics Device
device ref dtt on
chip drivers/intel/dptf