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authorNico Huber <nico.huber@secunet.com>2015-09-24 17:45:45 +0200
committerNico Huber <nico.h@gmx.de>2015-10-12 10:09:29 +0000
commitd5842f5b5facce03365415633359584002639a00 (patch)
tree40b0982add0c99f3be89dd69b8b0bde7fdbe1773
parent62047d1e4a3b0e4114cd936af705a3ace95ab313 (diff)
gma ACPI: Consolidate non-PCH and PCH brightness levels
The two cases only differ in the register locations. As the values in BRIG were all the same, consolidate them. They also got normalized to percentages as the ACPI spec wants that (0x61 was 100% before). Change-Id: I9216a953bb89458ed102c39194ea370cbf463d5e Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11703 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
-rw-r--r--src/drivers/intel/gma/acpi/brightness_levels.asl35
-rw-r--r--src/drivers/intel/gma/acpi/non-pch.asl45
-rw-r--r--src/drivers/intel/gma/acpi/pch.asl45
3 files changed, 47 insertions, 78 deletions
diff --git a/src/drivers/intel/gma/acpi/brightness_levels.asl b/src/drivers/intel/gma/acpi/brightness_levels.asl
new file mode 100644
index 0000000000..c186989fda
--- /dev/null
+++ b/src/drivers/intel/gma/acpi/brightness_levels.asl
@@ -0,0 +1,35 @@
+ Name (BRIG, Package (0x12)
+ {
+ 100, /* default AC */
+ 100, /* default Battery */
+ 2,
+ 4,
+ 5,
+ 7,
+ 9,
+ 11,
+ 13,
+ 18,
+ 20,
+ 24,
+ 29,
+ 33,
+ 40,
+ 50,
+ 67,
+ 100,
+ })
+
+ Method (XBCM, 1, NotSerialized)
+ {
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x0610, BCLM)
+ }
+
+ Method (XBQC, 0, NotSerialized)
+ {
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
+ }
diff --git a/src/drivers/intel/gma/acpi/non-pch.asl b/src/drivers/intel/gma/acpi/non-pch.asl
index 4c9e1eda3d..c445c97c8c 100644
--- a/src/drivers/intel/gma/acpi/non-pch.asl
+++ b/src/drivers/intel/gma/acpi/non-pch.asl
@@ -29,49 +29,16 @@ Device (GFX0)
BAR0, 64
}
- OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+ OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (0x61250),
- CR1, 32,
- BCLV, 16,
- BCLM, 16,
+ CR1, 32,
+ Offset (0x61254),
+ BCLV, 16,
+ BCLM, 16,
}
- Name (BRIG, Package (0x12)
- {
- 0x61,
- 0x61,
- 0x2,
- 0x4,
- 0x5,
- 0x7,
- 0x9,
- 0xb,
- 0xd,
- 0x11,
- 0x14,
- 0x17,
- 0x1c,
- 0x20,
- 0x27,
- 0x31,
- 0x41,
- 0x61,
- })
-
- Method (XBCM, 1, NotSerialized)
- {
- Store (ShiftLeft (Arg0, 4), BCLV)
- Store (0x80000000, CR1)
- Store (0x0610, BCLM)
- }
-
- Method (XBQC, 0, NotSerialized)
- {
- Store (BCLV, Local0)
- ShiftRight (Local0, 4, Local0)
- Return (Local0)
- }
+#include "brightness_levels.asl"
#include "common.asl"
}
diff --git a/src/drivers/intel/gma/acpi/pch.asl b/src/drivers/intel/gma/acpi/pch.asl
index 70ab6f6182..0a6b5834b9 100644
--- a/src/drivers/intel/gma/acpi/pch.asl
+++ b/src/drivers/intel/gma/acpi/pch.asl
@@ -26,53 +26,20 @@ Device (GFX0)
Field (GFXC, DWordAcc, NoLock, Preserve)
{
Offset (0x10),
- BAR0, 64
+ BAR0, 64
}
OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (0x48254),
- BCLV, 16,
+ BCLV, 16,
Offset (0xc8250),
- CR1, 32,
- CR2, 32
+ CR1, 32,
+ Offset (0xc8256),
+ BCLM, 16
}
- Name (BRIG, Package (0x12)
- {
- 0x61,
- 0x61,
- 0x2,
- 0x4,
- 0x5,
- 0x7,
- 0x9,
- 0xb,
- 0xd,
- 0x11,
- 0x14,
- 0x17,
- 0x1c,
- 0x20,
- 0x27,
- 0x31,
- 0x41,
- 0x61,
- })
-
- Method (XBCM, 1, NotSerialized)
- {
- Store (ShiftLeft (Arg0, 4), BCLV)
- Store (0x80000000, CR1)
- Store (0x061a061a, CR2)
- }
-
- Method (XBQC, 0, NotSerialized)
- {
- Store (BCLV, Local0)
- ShiftRight (Local0, 4, Local0)
- Return (Local0)
- }
+#include "brightness_levels.asl"
#include "common.asl"
}