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authorFelix Held <felix-coreboot@felixheld.de>2023-09-11 19:42:31 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-09-12 17:57:32 +0000
commitd30e0812952d3b933b79bfe1c7f4aea8af1ea252 (patch)
treed7260afe6f9edde8fc65c7b2fee88a55c2b74254
parentf372c40b90dd770d22dbc7350d6a09ca29cdb9c8 (diff)
soc/amd/*/Makefile: drop wrong EFS diagrams
The EFS data structure diagrams in the Makefiles of Picasso and newer SoCs were wrong, since the BIOS directory table pointer is in a different location than shown in the diagram. Since the diagram also wasn't that easy to understand and amdfwtool does all of that handling, drop the wrong diagram from the Makefiles. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5f86fea29f956ff10746d35dbe967a4a89e11cca Reviewed-on: https://review.coreboot.org/c/coreboot/+/77799 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
-rw-r--r--src/soc/amd/cezanne/Makefile.inc7
-rw-r--r--src/soc/amd/glinda/Makefile.inc7
-rw-r--r--src/soc/amd/mendocino/Makefile.inc7
-rw-r--r--src/soc/amd/phoenix/Makefile.inc7
-rw-r--r--src/soc/amd/picasso/Makefile.inc7
5 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 7b6c9982cb..76cb9e8cac 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -39,13 +39,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/cezanne/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
-# ROMSIG Normally At ROMBASE + 0x20000
-# +-----------+---------------+----------------+------------+
-# |0x55AA55AA | | | |
-# +-----------+---------------+----------------+------------+
-# | | PSPDIR ADDR | BIOSDIR ADDR |
-# +-----------+---------------+----------------+
-
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40
diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc
index e079c4bfb8..25b2fe4568 100644
--- a/src/soc/amd/glinda/Makefile.inc
+++ b/src/soc/amd/glinda/Makefile.inc
@@ -43,13 +43,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/glinda/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
-# ROMSIG Normally At ROMBASE + 0x20000
-# +-----------+---------------+----------------+------------+
-# |0x55AA55AA | | | |
-# +-----------+---------------+----------------+------------+
-# | | PSPDIR ADDR | BIOSDIR ADDR |
-# +-----------+---------------+----------------+
-
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40
diff --git a/src/soc/amd/mendocino/Makefile.inc b/src/soc/amd/mendocino/Makefile.inc
index 41ac61b09c..e16011d33a 100644
--- a/src/soc/amd/mendocino/Makefile.inc
+++ b/src/soc/amd/mendocino/Makefile.inc
@@ -42,13 +42,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/mendocino/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
-# ROMSIG Normally At ROMBASE + 0x20000
-# +-----------+---------------+----------------+------------+
-# |0x55AA55AA | | | |
-# +-----------+---------------+----------------+------------+
-# | | PSPDIR ADDR | BIOSDIR ADDR |
-# +-----------+---------------+----------------+
-
# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x80
diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc
index 344ece4e15..b2f566dac5 100644
--- a/src/soc/amd/phoenix/Makefile.inc
+++ b/src/soc/amd/phoenix/Makefile.inc
@@ -46,13 +46,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/phoenix/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
-# ROMSIG Normally At ROMBASE + 0x20000
-# +-----------+---------------+----------------+------------+
-# |0x55AA55AA | | | |
-# +-----------+---------------+----------------+------------+
-# | | PSPDIR ADDR | BIOSDIR ADDR |
-# +-----------+---------------+----------------+
-
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 4085274f01..9c3dd9f5f7 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -45,13 +45,6 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
-# ROMSIG Normally At ROMBASE + 0x20000
-# +-----------+---------------+----------------+------------+
-# |0x55AA55AA | | | |
-# +-----------+---------------+----------------+------------+
-# | | PSPDIR ADDR | BIOSDIR ADDR |
-# +-----------+---------------+----------------+
-
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40