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authorJeremy Soller <jeremy@system76.com>2021-08-12 10:49:58 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-08-24 14:51:47 +0000
commitd0bf24750623561fd2ea3d349853e061224931b2 (patch)
tree6af188306dc2b39f93c0b7fa7ea96f200157e4b2
parentcc43ec8b1a846fef22dc935edbb4d76140d305f5 (diff)
soc/intel/tigerlake: Add USB ACPI devices for PCH-H
Change-Id: Ia1c1c3d172366ddcc8c194cb2e0b0c2fb2acf678 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/soc/intel/tigerlake/acpi/xhci.asl36
-rw-r--r--src/soc/intel/tigerlake/chip.c12
2 files changed, 48 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/acpi/xhci.asl b/src/soc/intel/tigerlake/acpi/xhci.asl
index 065938eef5..4215185eb3 100644
--- a/src/soc/intel/tigerlake/acpi/xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci.asl
@@ -24,6 +24,41 @@ Device (XHCI)
}
+#if CONFIG(SOC_INTEL_TIGERLAKE_PCH_H)
+ /* Root Hub for Tigerlake-H PCH */
+ Device (RHUB)
+ {
+ Name (_ADR, Zero)
+
+ /* USB2 */
+ Device (HS01) { Name (_ADR, 1) }
+ Device (HS02) { Name (_ADR, 2) }
+ Device (HS03) { Name (_ADR, 3) }
+ Device (HS04) { Name (_ADR, 4) }
+ Device (HS05) { Name (_ADR, 5) }
+ Device (HS06) { Name (_ADR, 6) }
+ Device (HS07) { Name (_ADR, 7) }
+ Device (HS08) { Name (_ADR, 8) }
+ Device (HS09) { Name (_ADR, 9) }
+ Device (HS10) { Name (_ADR, 10) }
+ Device (HS11) { Name (_ADR, 11) }
+ Device (HS12) { Name (_ADR, 12) }
+ Device (HS13) { Name (_ADR, 13) }
+ Device (HS14) { Name (_ADR, 14) }
+
+ /* USB3 */
+ Device (SS01) { Name (_ADR, 15) }
+ Device (SS02) { Name (_ADR, 16) }
+ Device (SS03) { Name (_ADR, 17) }
+ Device (SS04) { Name (_ADR, 18) }
+ Device (SS05) { Name (_ADR, 19) }
+ Device (SS06) { Name (_ADR, 20) }
+ Device (SS07) { Name (_ADR, 21) }
+ Device (SS08) { Name (_ADR, 22) }
+ Device (SS09) { Name (_ADR, 23) }
+ Device (SS10) { Name (_ADR, 24) }
+ }
+#else
/* Root Hub for Tigerlake-LP PCH */
Device (RHUB)
{
@@ -47,4 +82,5 @@ Device (XHCI)
Device (SS03) { Name (_ADR, 15) }
Device (SS04) { Name (_ADR, 16) }
}
+#endif /* CONFIG(SOC_INTEL_TIGERLAKE_PCH_H) */
}
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index dcdaa1ad93..6994d94c52 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -54,6 +54,11 @@ const char *soc_acpi_name(const struct device *dev)
case 7: return "HS08";
case 8: return "HS09";
case 9: return "HS10";
+ /* PCH-H only */
+ case 10: return "HS11";
+ case 11: return "HS12";
+ case 12: return "HS13";
+ case 13: return "HS14";
}
break;
case 3:
@@ -63,6 +68,13 @@ const char *soc_acpi_name(const struct device *dev)
case 1: return "SS02";
case 2: return "SS03";
case 3: return "SS04";
+ /* PCH-H only */
+ case 4: return "SS05";
+ case 5: return "SS06";
+ case 6: return "SS07";
+ case 7: return "SS08";
+ case 8: return "SS09";
+ case 9: return "SS10";
}
break;
}