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authorIan Feng <ian_feng@compal.corp-partner.google.com>2022-11-08 10:49:51 +0800
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2022-11-09 07:56:03 +0000
commitd08deaabe15f39df6610df7bc06544722002279c (patch)
tree6a6f1b62e532f81bdfcc14e1ad8ff0e4833e2747
parent20265b09dc6bbfb8c708accf6c0cf67f63cb79c3 (diff)
mb/google/nissa/var/xivu: Add Hynix new memory support
Add new ram_id:0 (0000) for memory part H9JCNNNCP3MLYR-N6E. DRAM Part Name ID to assign H9JCNNNCP3MLYR-N6E 0 (0000) BUG=b:257867226 TEST=Use part_id_gen to generate related settings and emerge-nissa coreboot Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: If663afbcd2e0457636f4a1c7475f1e3e40f0dd96 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69312 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com>
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/Makefile.inc2
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt1
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt1
3 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
index 853599749a..8487277b5b 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
+++ b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
@@ -4,7 +4,7 @@
# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
SPD_SOURCES =
-SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B
+SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B, H9JCNNNCP3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP
SPD_SOURCES += spd/lp5/set-0/spd-6.hex # ID = 3(0b0011) Parts = K3LKCKC0BM-MGCP
diff --git a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
index 579a4fa802..a462e5f2df 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
+++ b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
@@ -7,5 +7,6 @@ DRAM Part Name ID to assign
MT62F1G32D4DR-031 WT:B 0 (0000)
MT62F512M32D2DR-031 WT:B 1 (0001)
H9JCNNNBK3MLYR-N6E 1 (0001)
+H9JCNNNCP3MLYR-N6E 0 (0000)
K3LKBKB0BM-MGCP 2 (0010)
K3LKCKC0BM-MGCP 3 (0011)
diff --git a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
index 2d8f7bee4e..6d01c57de8 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
+++ b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
@@ -12,5 +12,6 @@
MT62F1G32D4DR-031 WT:B
MT62F512M32D2DR-031 WT:B
H9JCNNNBK3MLYR-N6E
+H9JCNNNCP3MLYR-N6E
K3LKBKB0BM-MGCP
K3LKCKC0BM-MGCP