diff options
author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-11-27 01:33:00 -0800 |
---|---|---|
committer | Werner Zeh <werner.zeh@siemens.com> | 2020-12-10 10:48:02 +0000 |
commit | d0789cd6f031ed911c9216ce576b18e251afb468 (patch) | |
tree | 08d373b94d9f4d1ea543b1d9a85e8b855f96d200 | |
parent | 64d749d8630a290cd5f6903855d5f937d5948733 (diff) |
mb/intel/ehlcrb: Remove ChromeOS EC related headers
Since EHL CRB does not support ChromeOS, this patch removes
ChromeOS EC related headers (ec.h & gpio.h) and #includes.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I9c0c3722065c041769081f3d564646ce6a565a9b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48119
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
7 files changed, 0 insertions, 88 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/bootblock.c b/src/mainboard/intel/elkhartlake_crb/bootblock.c index a8f7e41433..c39a8ff9ba 100644 --- a/src/mainboard/intel/elkhartlake_crb/bootblock.c +++ b/src/mainboard/intel/elkhartlake_crb/bootblock.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <baseboard/gpio.h> #include <baseboard/variants.h> #include <bootblock_common.h> #include <soc/gpio.h> diff --git a/src/mainboard/intel/elkhartlake_crb/dsdt.asl b/src/mainboard/intel/elkhartlake_crb/dsdt.asl index dcbf380ff0..9dd33a8ab7 100644 --- a/src/mainboard/intel/elkhartlake_crb/dsdt.asl +++ b/src/mainboard/intel/elkhartlake_crb/dsdt.asl @@ -1,8 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <baseboard/ec.h> -#include <baseboard/gpio.h> DefinitionBlock( "dsdt.aml", diff --git a/src/mainboard/intel/elkhartlake_crb/mainboard.c b/src/mainboard/intel/elkhartlake_crb/mainboard.c index efba386cf9..a8a1cc20e2 100644 --- a/src/mainboard/intel/elkhartlake_crb/mainboard.c +++ b/src/mainboard/intel/elkhartlake_crb/mainboard.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <baseboard/gpio.h> #include <baseboard/variants.h> #include <device/device.h> #include <intelblocks/pcr.h> diff --git a/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/ec.h b/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/ec.h deleted file mode 100644 index f05cb7722a..0000000000 --- a/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/ec.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __BASEBOARD_EC_H__ -#define __BASEBOARD_EC_H__ - -#include <ec/ec.h> -#include <ec/google/chromeec/ec_commands.h> -#include <baseboard/gpio.h> - -#define MAINBOARD_EC_SCI_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP)) - -#define MAINBOARD_EC_SMI_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) - -/* EC can wake from S5 with lid or power button */ -#define MAINBOARD_EC_S5_WAKE_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) - -/* - * EC can wake from S3 with lid or power button or key press or - * mode change event. - */ -#define MAINBOARD_EC_S3_WAKE_EVENTS \ - (MAINBOARD_EC_S5_WAKE_EVENTS |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) - -/* Log EC wake events plus EC shutdown events */ -#define MAINBOARD_EC_LOG_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) - -/* - * ACPI related definitions for ASL code. - */ - -/* Enable EC backed ALS device in ACPI */ -#define EC_ENABLE_ALS_DEVICE - -/* Enable EC backed PD MCU device in ACPI */ -#define EC_ENABLE_PD_MCU_DEVICE - -/* Enable LID switch and provide wake pin for EC */ -#define EC_ENABLE_LID_SWITCH -#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE - -#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ -#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ -#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ - -#endif /* __BASEBOARD_EC_H__ */ diff --git a/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/gpio.h deleted file mode 100644 index de0adf6cff..0000000000 --- a/src/mainboard/intel/elkhartlake_crb/variants/baseboard/include/baseboard/gpio.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __BASEBOARD_GPIO_H__ -#define __BASEBOARD_GPIO_H__ - -#include <soc/gpe.h> -#include <soc/gpio.h> - -/* eSPI virtual wire reporting */ -#define EC_SCI_GPI GPE0_ESPI - -/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ -#define GPE_EC_WAKE GPE0_LAN_WAK - -#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c index fe2aff74d2..003a6a557e 100644 --- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c +++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c index cca208ed64..8446e6cb0f 100644 --- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c +++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <baseboard/variants.h> -#include <baseboard/gpio.h> #include <console/console.h> #include <gpio.h> #include <soc/meminit.h> |