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authorRonald G. Minnich <rminnich@gmail.com>2013-08-29 09:16:25 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2014-08-10 22:19:16 +0200
commitcff6667eba803498e2f93af68e6e2edbba2353e5 (patch)
tree3ec00fb2b881a702ce64d337a58295226f75e654
parent985ff36bee24d1e5a8bd698409a0a05e15528c01 (diff)
exynos5420: Tighten up displayport timing loops
We were running this loop 100 times with 5 ms delays. Change it to run 500 times with 1 ms delays, which gives us the same overall timeout but lets us bail out a bit sooner -- in practice, at most, 4 ms sooner but every bit counts. Note, however, that the tighter timing does reduce opportunities for threading. There is a non-obvious set of tradeoffs on timeouts. Change-Id: I4af671c2a791aa92e446e66ac2fe5710d1e6aa4c Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/167387 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: ron minnich <rminnich@chromium.org> Tested-by: ron minnich <rminnich@chromium.org> (cherry picked from commit 575e910127dc74416018f182ef27ef223e61daef) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6543 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/cpu/samsung/exynos5420/dp.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/cpu/samsung/exynos5420/dp.c b/src/cpu/samsung/exynos5420/dp.c
index b6f83b6519..c1fa17a9c6 100644
--- a/src/cpu/samsung/exynos5420/dp.c
+++ b/src/cpu/samsung/exynos5420/dp.c
@@ -845,7 +845,7 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
exynos_dp_start_video();
if (edp_info->video_info.master_mode == 0) {
- retry_cnt = 100;
+ retry_cnt = 500;
while (retry_cnt) {
ret = exynos_dp_is_video_stream_on();
if (ret != EXYNOS_DP_SUCCESS) {
@@ -857,7 +857,10 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
printk(BIOS_DEBUG, "DP video stream is on\n");
break;
}
- mdelay(5);
+ /* this is a cheap operation, involving some register
+ * reads, and no AUX channel IO. A ms. delay is fine.
+ */
+ mdelay(1);
}
}