diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-01-04 05:38:43 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-04-19 10:10:20 +0000 |
| commit | cbfcb2a6bb14ca642db857d39c22a8550b917a25 (patch) | |
| tree | 6dee19181fa92d9b7bd93958b644483734f17224 | |
| parent | 24f4623384d372345e63051ec3a3c3724faa226f (diff) | |
mb/clevo/l140cu: Move FSP-M config hook to mainboard level
Hook up FSP-M configuration on mainboard level instead of variant level
being able to do common configuration there.
Also, hook up variant romstage.c on mainboard level for variant
specific configurations.
Change-Id: Ic161f83cb629b1e70ca670e10975a25bc0949656
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
| -rw-r--r-- | src/mainboard/clevo/cml-u/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/include/variant/romstage.h | 8 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/romstage.c | 9 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/romstage.c | 4 |
5 files changed, 22 insertions, 3 deletions
diff --git a/src/mainboard/clevo/cml-u/Makefile.inc b/src/mainboard/clevo/cml-u/Makefile.inc index 213e62f1ee..d9f4ae9ee0 100644 --- a/src/mainboard/clevo/cml-u/Makefile.inc +++ b/src/mainboard/clevo/cml-u/Makefile.inc @@ -3,6 +3,9 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include bootblock-y += bootblock.c bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c +romstage-y += romstage.c +romstage-y += variants/$(VARIANT_DIR)/romstage.c + ramstage-y += ramstage.c ramstage-y += variants/$(VARIANT_DIR)/gpio.c ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c diff --git a/src/mainboard/clevo/cml-u/include/variant/romstage.h b/src/mainboard/clevo/cml-u/include/variant/romstage.h new file mode 100644 index 0000000000..cfcc6ab08d --- /dev/null +++ b/src/mainboard/clevo/cml-u/include/variant/romstage.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef VARIANT_ROMSTAGE_H +#define VARIANT_ROMSTAGE_H + +void variant_configure_fspm(FSPM_UPD *memupd); + +#endif diff --git a/src/mainboard/clevo/cml-u/romstage.c b/src/mainboard/clevo/cml-u/romstage.c new file mode 100644 index 0000000000..5ba6c5676a --- /dev/null +++ b/src/mainboard/clevo/cml-u/romstage.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/romstage.h> +#include <variant/romstage.h> + +void mainboard_memory_init_params(FSPM_UPD *memupd) +{ + variant_configure_fspm(memupd); +} diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/Makefile.inc b/src/mainboard/clevo/cml-u/variants/l140cu/Makefile.inc index 0e47d8680f..09089b43ad 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/Makefile.inc +++ b/src/mainboard/clevo/cml-u/variants/l140cu/Makefile.inc @@ -1,2 +1 @@ -romstage-y += romstage.c SPD_SOURCES = samsung-K4AAG165WA-BCTD diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c index 4cad131765..89cccc4097 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c +++ b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/cnl_memcfg_init.h> -#include <soc/romstage.h> +#include <variant/romstage.h> static const struct cnl_mb_cfg memcfg = { .spd[0] = { @@ -29,7 +29,7 @@ static const struct cnl_mb_cfg memcfg = { .vref_ca_config = 2, }; -void mainboard_memory_init_params(FSPM_UPD *memupd) +void variant_configure_fspm(FSPM_UPD *memupd) { cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); } |