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authorLijian Zhao <lijian.zhao@intel.com>2019-04-19 20:21:43 -0700
committerDuncan Laurie <dlaurie@chromium.org>2019-05-09 00:25:35 +0000
commitc7817bc1280fe2e017c2f99dbb3d19c414ee8c63 (patch)
treeea607769e6ac48695ad3a3420d40b6cf26b81769
parentb3ddb29c366d043e9988f1865e9f414e716f02f3 (diff)
soc/intel/common/acpi: Remove EC PTS/WAK dynamic loading
Use CondRefOf to replace config optios for PTS/WAK acpi method dynamic loading. Then we can move EC PTS and WAK method to be under mainboard. BUG=N/A TEST=Build sarien source code, check build/dsdt.dsl have EC.PTS method included, build whlrvp soure, check build/dsdt.dsl don't have EC.PTS method. Both able to build pass. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I9f4bd7240832caf070e65039e4ba2d8656371da8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32371 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/sarien/Kconfig1
-rw-r--r--src/soc/intel/common/Kconfig7
-rw-r--r--src/soc/intel/common/acpi/platform.asl9
3 files changed, 0 insertions, 17 deletions
diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig
index c48a908dc1..e6d1f1f60f 100644
--- a/src/mainboard/google/sarien/Kconfig
+++ b/src/mainboard/google/sarien/Kconfig
@@ -16,7 +16,6 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_I2C_TPM_CR50
select MAINBOARD_HAS_TPM2
- select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
select SOC_INTEL_WHISKEYLAKE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 318cc25c87..ac2268661f 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -51,13 +51,6 @@ config SOC_INTEL_COMMON_ACPI
bool
default n
-config SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
- bool
- default n
- help
- Set this option to have the platform level _PTS/_WAK methods call
- methods provided by the Embedded Controller.
-
config SOC_INTEL_COMMON_NHLT
bool
default n
diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index 8b85d44057..9aa2edc6df 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -37,10 +37,6 @@ Method (_PTS, 1)
{
Store (POST_OS_ENTER_PTS, DBG0)
-#if CONFIG(SOC_INTEL_COMMON_ACPI_EC_PTS_WAK)
- /* Call EC _PTS handler */
- \_SB.PCI0.LPCB.EC0.PTS (Arg0)
-#endif
If (CondRefOf (\_SB.MPTS))
{
\_SB.MPTS (Arg0)
@@ -58,10 +54,5 @@ Method (_WAK, 1)
\_SB.MWAK (Arg0)
}
-#if CONFIG(SOC_INTEL_COMMON_ACPI_EC_PTS_WAK)
- /* Call EC _WAK handler */
- \_SB.PCI0.LPCB.EC0.WAK (Arg0)
-#endif
-
Return (Package(){0,0})
}