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authorArthur Heymans <arthur@aheymans.xyz>2016-10-27 00:30:07 +0200
committerMartin Roth <martinroth@google.com>2016-11-09 00:26:56 +0100
commitc5d972d073cacb1b0b6b34b268df70e32a63246e (patch)
tree81a8cd58933ac9477c4c5eec119e979654992a21
parent10141c300624466b70c272d8c0879424e9927e8d (diff)
Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig
Change-Id: I51cf4f35bf2ea95c8c19ab885e6308535314b0af Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17153 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/cpu/intel/model_1067x/Kconfig1
-rw-r--r--src/northbridge/intel/gm45/Kconfig1
2 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index da8ddc515b..12f04cc2a1 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -6,5 +6,6 @@ config CPU_INTEL_MODEL_1067X
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
+# select UDELAY_LAPIC
select TSC_SYNC_MFENCE
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index d4f43906bc..6ee65580b0 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -26,7 +26,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
- select UDELAY_LAPIC
config CBFS_SIZE
hex