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authorSubrata Banik <subratabanik@google.com>2024-07-17 11:43:26 +0000
committerSubrata Banik <subratabanik@google.com>2024-07-19 03:55:59 +0000
commitc54d186717b584117c1beffda3e0beb89652eebf (patch)
tree7148752a901521fb2c84805df279d20c4ae326f4
parentf79e0893cdd1fab0e53bc34f414445777559a0ad (diff)
device/pci_ids: Add new Intel PTL device IDs for CSE0
This patch adds new CSE0 PCI device IDs for Intel PTL-U and PTL-H. Additionally, updates the CSE0 driver's `pci_device_ids` list to include these new IDs. Finally, dropped unused CSE1-3 PCI IDs. Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2 BUG=b:347669091 TEST=Able to build google/fatcat. Change-Id: I5656aeb8c5439c8361aeb3a3d759df1216d84f8b Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83517 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/include/device/pci_ids.h6
-rw-r--r--src/soc/intel/common/block/cse/cse.c3
2 files changed, 4 insertions, 5 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 716f386830..445658f63b 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4679,10 +4679,8 @@
#define PCI_DID_INTEL_RPP_S_CSE3 0x7a6d
#define PCI_DID_INTEL_MTL_CSE0 0x7e70
#define PCI_DID_INTEL_LNL_CSE0 0xa870
-#define PCI_DID_INTEL_PTL_CSE0 0xe470
-#define PCI_DID_INTEL_PTL_CSE1 0xe471
-#define PCI_DID_INTEL_PTL_CSE2 0xe474
-#define PCI_DID_INTEL_PTL_CSE3 0xe475
+#define PCI_DID_INTEL_PTL_H_CSE0 0xe470
+#define PCI_DID_INTEL_PTL_U_H_CSE0 0xe370
/* Intel XDCI device Ids */
#define PCI_DID_INTEL_APL_XDCI 0x5aaa
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index ed07f69283..6389044428 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -1479,7 +1479,8 @@ struct device_operations cse_ops = {
};
static const unsigned short pci_device_ids[] = {
- PCI_DID_INTEL_PTL_CSE0,
+ PCI_DID_INTEL_PTL_H_CSE0,
+ PCI_DID_INTEL_PTL_U_H_CSE0,
PCI_DID_INTEL_LNL_CSE0,
PCI_DID_INTEL_MTL_CSE0,
PCI_DID_INTEL_APL_CSE0,