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authorArthur Heymans <arthur@aheymans.xyz>2023-07-14 23:27:31 +0200
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-10-20 14:28:57 +0000
commitc5122f9f1c4258bd6beb31b4342dba68e54d2f1f (patch)
tree4490f8d4ca77205633eed22e09b66dd3a28e761d
parent0a2d2a974466245b6429daafbb08ddb2e77406aa (diff)
soc/amd/genoa: Hook up IOMMU ops
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I2419feed1a76ec1cb04cb9640689b8758fa1d3f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
-rw-r--r--src/soc/amd/genoa/Kconfig1
-rw-r--r--src/soc/amd/genoa/chipset.cb8
2 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index a371d218db..8bfae4f561 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -14,6 +14,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
+ select SOC_AMD_COMMON_BLOCK_IOMMU
select SOC_AMD_COMMON_BLOCK_LPC
select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
diff --git a/src/soc/amd/genoa/chipset.cb b/src/soc/amd/genoa/chipset.cb
index b7b1868d2d..6fd6bf3002 100644
--- a/src/soc/amd/genoa/chipset.cb
+++ b/src/soc/amd/genoa/chipset.cb
@@ -6,7 +6,7 @@ chip soc/amd/genoa
device domain 0 on
device pci 00.0 alias gnb_0 on end
- device pci 00.2 alias iommu_0 off end
+ device pci 00.2 alias iommu_0 on ops amd_iommu_ops end
device pci 00.3 alias rcec_0 off end
device pci 01.0 on end # Dummy Host Bridge, do not disable
@@ -73,7 +73,7 @@ chip soc/amd/genoa
device domain 1 on
device pci 00.0 alias gnb_1 on end
- device pci 00.2 alias iommu_1 off end
+ device pci 00.2 alias iommu_1 on ops amd_iommu_ops end
device pci 00.3 alias rcec_1 off end
device pci 01.0 on end # Dummy Host Bridge, do not disable
@@ -113,7 +113,7 @@ chip soc/amd/genoa
device domain 2 on
device pci 00.0 alias gnb_2 on end
- device pci 00.2 alias iommu_2 off end
+ device pci 00.2 alias iommu_2 on ops amd_iommu_ops end
device pci 00.3 alias rcec_2 off end
device pci 01.0 on end # Dummy Host Bridge, do not disable
@@ -153,7 +153,7 @@ chip soc/amd/genoa
device domain 3 on
device pci 00.0 alias gnb_3 on end
- device pci 00.2 alias iommu_3 off end
+ device pci 00.2 alias iommu_3 on ops amd_iommu_ops end
device pci 00.3 alias rcec_3 off end
device pci 01.0 on end # Dummy Host Bridge, do not disable