diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-12-29 13:35:06 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2022-01-06 02:24:39 +0000 |
| commit | c46cadd22bb4fc4bbb0a77a42afd83f9b323fb57 (patch) | |
| tree | dc93ba65ef51209959582d6d414b3a05fe9b2b71 | |
| parent | a8a9552d75f91b05a65a1da7281e877d71f87b94 (diff) | |
soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
The current CBFS mcache size (roughly 7KiB) is insufficient for mt8186,
so we need to increase it by 1KiB (and decrease the stack by 1KiB).
Error logs:
CBFS ERROR: mcache overflow, should increase CBFS_MCACHE size!
CBFS: mcache @0x0010e004 built for 63 files, used 0xde4 of 0xdfc bytes
BUG=b:202871018
TEST=no cbfs error logs.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60529
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/mediatek/mt8186/include/soc/memlayout.ld | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/mediatek/mt8186/include/soc/memlayout.ld b/src/soc/mediatek/mt8186/include/soc/memlayout.ld index 36078d3f4d..942c919f45 100644 --- a/src/soc/mediatek/mt8186/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8186/include/soc/memlayout.ld @@ -23,13 +23,13 @@ SECTIONS { SRAM_START(0x00100000) VBOOT2_WORK(0x00100000, 12K) - STACK(0x00103000, 8K) - TTB(0x00105000, 28K) - DMA_COHERENT(0x0010C000, 4K) - TPM_TCPA_LOG(0x0010D000, 2K) - FMAP_CACHE(0x0010D800, 2K) - WATCHDOG_TOMBSTONE(0x0010E000, 4) - CBFS_MCACHE(0x0010E004, 7K - 4) + TTB(0x00103000, 28K) + DMA_COHERENT(0x0010A000, 4K) + TPM_TCPA_LOG(0x0010B000, 2K) + FMAP_CACHE(0x0010B800, 2K) + WATCHDOG_TOMBSTONE(0x0010C000, 4) + CBFS_MCACHE(0x0010C004, 8K - 4) + STACK(0x0010E000, 7K) TIMESTAMP(0x0010FC00, 1K) /* MT8186 has 64KB SRAM. */ SRAM_END(0x00110000) |