AGESA,binaryPI boards: Drop unused variables in ASL

Change-Id: I1d1323ab8bb8565c05fd50697e29c61f9932a2c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

29 files changed, 0 insertions, 208 deletions

diff --git a/src/mainboard/amd/gardenia/acpi/mainboard.asl b/src/mainboard/amd/gardenia/acpi/mainboard.asl
index 3875174f5d..3a9eafb041 100644
--- a/src/mainboard/amd/gardenia/acpi/mainboard.asl
+++ b/src/mainboard/amd/gardenia/acpi/mainboard.asl
@@ -1,10 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
diff --git a/src/mainboard/amd/inagua/acpi/mainboard.asl b/src/mainboard/amd/inagua/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/amd/inagua/acpi/mainboard.asl
+++ b/src/mainboard/amd/inagua/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/amd/olivehill/acpi/mainboard.asl b/src/mainboard/amd/olivehill/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/amd/olivehill/acpi/mainboard.asl
+++ b/src/mainboard/amd/olivehill/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/amd/padmelon/acpi/mainboard.asl b/src/mainboard/amd/padmelon/acpi/mainboard.asl
index 3875174f5d..3a9eafb041 100644
--- a/src/mainboard/amd/padmelon/acpi/mainboard.asl
+++ b/src/mainboard/amd/padmelon/acpi/mainboard.asl
@@ -1,10 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
diff --git a/src/mainboard/amd/parmer/acpi/mainboard.asl b/src/mainboard/amd/parmer/acpi/mainboard.asl
index 8810d47395..ae2823e7d7 100644
--- a/src/mainboard/amd/parmer/acpi/mainboard.asl
+++ b/src/mainboard/amd/parmer/acpi/mainboard.asl
@@ -1,15 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 	/* AcpiGpe0Blk */
 	OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/amd/persimmon/acpi/mainboard.asl b/src/mainboard/amd/persimmon/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/amd/persimmon/acpi/mainboard.asl
+++ b/src/mainboard/amd/persimmon/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/amd/south_station/acpi/mainboard.asl b/src/mainboard/amd/south_station/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/amd/south_station/acpi/mainboard.asl
+++ b/src/mainboard/amd/south_station/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/amd/thatcher/acpi/mainboard.asl b/src/mainboard/amd/thatcher/acpi/mainboard.asl
index 8810d47395..ae2823e7d7 100644
--- a/src/mainboard/amd/thatcher/acpi/mainboard.asl
+++ b/src/mainboard/amd/thatcher/acpi/mainboard.asl
@@ -1,15 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 	/* AcpiGpe0Blk */
 	OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/amd/union_station/acpi/mainboard.asl b/src/mainboard/amd/union_station/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/amd/union_station/acpi/mainboard.asl
+++ b/src/mainboard/amd/union_station/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/asrock/e350m1/acpi/mainboard.asl b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/asrock/e350m1/acpi/mainboard.asl
+++ b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
+++ b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/asus/a88xm-e/acpi/mainboard.asl b/src/mainboard/asus/a88xm-e/acpi/mainboard.asl
index 2062962ec9..49d98d2c94 100644
--- a/src/mainboard/asus/a88xm-e/acpi/mainboard.asl
+++ b/src/mainboard/asus/a88xm-e/acpi/mainboard.asl
@@ -1,15 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	/* Base address of PCIe config space */
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)
 	/* Length of PCIe config space, 1MB each bus */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER))
 	/* Base address of HPET table */
-	Name(HPBA, 0xFED00000)
diff --git a/src/mainboard/asus/am1i-a/acpi/mainboard.asl b/src/mainboard/asus/am1i-a/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/asus/am1i-a/acpi/mainboard.asl
+++ b/src/mainboard/asus/am1i-a/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/asus/f2a85-m/acpi/mainboard.asl b/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
index 9ccdbeff45..0f90393d21 100644
--- a/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
+++ b/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
@@ -1,12 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
diff --git a/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl b/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
+++ b/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl b/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
+++ b/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/biostar/am1ml/acpi/mainboard.asl b/src/mainboard/biostar/am1ml/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/biostar/am1ml/acpi/mainboard.asl
+++ b/src/mainboard/biostar/am1ml/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/elmex/pcm205400/acpi/mainboard.asl b/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl b/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl b/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
+++ b/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/mainboard.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/mainboard.asl
index c983b6439c..9ba02606fd 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/mainboard.asl
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/mainboard.asl
@@ -1,10 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name (LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name (PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name (PBLN, 0x0)	/* Length of BIOS area */
-
 /* Base address of PCIe config space */
 Name (PCBA, CONFIG_MMCONF_BASE_ADDRESS)
 
@@ -12,4 +7,3 @@ Name (PCBA, CONFIG_MMCONF_BASE_ADDRESS)
 Name (PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER))
 
 /* Base address of HPET table */
-Name (HPBA, 0xFED00000)
diff --git a/src/mainboard/hp/abm/acpi/mainboard.asl b/src/mainboard/hp/abm/acpi/mainboard.asl
index 7b726b737a..02e71927a6 100644
--- a/src/mainboard/hp/abm/acpi/mainboard.asl
+++ b/src/mainboard/hp/abm/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
index 4bde39df7c..27c48b5d31 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
@@ -1,15 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 	/* AcpiGpe0Blk */
 	OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
index 4bde39df7c..27c48b5d31 100644
--- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl
+++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
@@ -1,15 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 	/* AcpiGpe0Blk */
 	OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index 4e4194ead3..826f8bd7bf 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -13,15 +13,7 @@ DefinitionBlock (
 {	/* Start of ASL file */
 	#include <acpi/dsdt_top.asl>
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
diff --git a/src/mainboard/msi/ms7721/acpi/mainboard.asl b/src/mainboard/msi/ms7721/acpi/mainboard.asl
index 9ccdbeff45..0f90393d21 100644
--- a/src/mainboard/msi/ms7721/acpi/mainboard.asl
+++ b/src/mainboard/msi/ms7721/acpi/mainboard.asl
@@ -1,12 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-	/* Data to be patched by the BIOS during POST */
-	/* FIXME the patching is not done yet! */
-	/* Memory related values */
-	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-	Name(PBLN, 0x0)	/* Length of BIOS area */
-
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
diff --git a/src/mainboard/pcengines/apu1/acpi/mainboard.asl b/src/mainboard/pcengines/apu1/acpi/mainboard.asl
index 8c38cce45f..32ab6112e3 100644
--- a/src/mainboard/pcengines/apu1/acpi/mainboard.asl
+++ b/src/mainboard/pcengines/apu1/acpi/mainboard.asl
@@ -1,14 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Data to be patched by the BIOS during POST */
-/* FIXME the patching is not done yet! */
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 Scope(\_SI) {
 	Method(_SST, 1) {
diff --git a/src/mainboard/pcengines/apu2/acpi/mainboard.asl b/src/mainboard/pcengines/apu2/acpi/mainboard.asl
index f512582a02..406f18880c 100644
--- a/src/mainboard/pcengines/apu2/acpi/mainboard.asl
+++ b/src/mainboard/pcengines/apu2/acpi/mainboard.asl
@@ -1,13 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
 /* AcpiGpe0Blk */
 OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)