inteltool/ahci: Don't print reserved, all-zero registers

Behavior matches with other dumps of inteltool.

Change-Id: Id9755d251fc42185c9e8d574deb55c76e129b718
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 34 insertions, 19 deletions

diff --git a/util/inteltool/ahci.c b/util/inteltool/ahci.c
index 3f1b33f4b9..6d539f437d 100644
--- a/util/inteltool/ahci.c
+++ b/util/inteltool/ahci.c
@@ -37,11 +37,29 @@ static const char *port_ctl_regs[] = {
 #define NUM_GHC (sizeof(ghc_regs)/sizeof(ghc_regs[0]))
 #define NUM_PORTCTL (sizeof(port_ctl_regs)/sizeof(port_ctl_regs[0]))
 
+#define MMIO(offset) (*(uint32_t *)(mmio + offset))
+#define MMIO_PORT(offset) (*(uint32_t *)(mmio_port + offset))
+
+static void print_port(const uint8_t *const mmio, size_t port)
+{
+	size_t i;
+	printf("\nPort %zu Control Registers:\n", port);
+	const uint8_t *const mmio_port = mmio + 0x100 + port * 0x80;
+	for (i = 0; i < 0x80; i += 4) {
+		if (i / 4 < NUM_PORTCTL) {
+			printf("0x%03zx: 0x%08x (%s)\n",
+			       (size_t)(mmio_port - mmio) + i,
+			       MMIO_PORT(i), port_ctl_regs[i / 4]);
+		} else if (MMIO_PORT(i)) {
+			printf("0x%03zx: 0x%08x (Reserved)\n",
+			       (size_t)(mmio_port - mmio) + i, MMIO_PORT(i));
+		}
+	}
+}
+
 int print_ahci(struct pci_dev *ahci)
 {
-	size_t mmio_size;
-	uint8_t *mmio;
-	uint32_t i, j;
+	size_t mmio_size, i;
 
 	if (!ahci) {
 		puts("No SATA device found");
@@ -56,7 +74,7 @@ int print_ahci(struct pci_dev *ahci)
 
 	const pciaddr_t mmio_phys = ahci->base_addr[5] & ~0x7ULL;
 	printf("ABAR = 0x%08llx (MEM)\n\n", (unsigned long long)mmio_phys);
-	mmio = map_physical(mmio_phys, mmio_size);
+	const uint8_t *const mmio = map_physical(mmio_phys, mmio_size);
 	if (mmio == NULL) {
 		perror("Error mapping MMIO");
 		exit(1);
@@ -64,29 +82,26 @@ int print_ahci(struct pci_dev *ahci)
 
 	puts("Generic Host Control Registers:");
 	for (i = 0; i < 0x100; i += 4) {
-		printf("0x%02x: 0x%08x (%s)\n", i, *(uint32_t *)(mmio + i),
-				 (i / 4 < NUM_GHC) ? ghc_regs[i / 4]:"Reserved");
+		if (i / 4 < NUM_GHC) {
+			printf("0x%03zx: 0x%08x (%s)\n",
+			       i, MMIO(i), ghc_regs[i / 4]);
+		} else if (MMIO(i)) {
+			printf("0x%03zx: 0x%08x (Reserved)\n", i, MMIO(i));
+		}
 	}
 
 	const size_t max_ports = (mmio_size - 0x100) / 0x80;
 	for (i = 0; i < max_ports; i++) {
-		if (*(uint32_t *)(mmio + 0x0c) & 1 << i) {
-			printf("\nPort %d Control Registers:\n", i);
-			uint8_t *mmio_port = mmio + 0x100 + i * 0x80;
-			for (j = 0; j < 0x80; j += 4) {
-				printf("0x%03x: 0x%08x (%s)\n", 0x100+i*0x80+j,
-				       *(uint32_t *)(mmio_port + j),
-				       (j / 4 < NUM_PORTCTL) ?
-				       port_ctl_regs[j / 4] :
-				       "Reserved");
-			}
-		}
+		if (MMIO(0x0c) & 1 << i)
+			print_port(mmio, i);
 	}
 
 	if (ahci->device_id == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA) {
 		puts("\nOther registers:");
-		for (i = 0x500; i < mmio_size; i += 4)
-			printf("0x%03x: 0x%08x\n", i, *(uint32_t *)(mmio + i));
+		for (i = 0x500; i < mmio_size; i += 4) {
+			if (MMIO(i))
+				printf("0x%03zx: 0x%08x\n", i, MMIO(i));
+		}
 	}
 
 	unmap_physical((void *)mmio, mmio_size);