CBMEM: Add cbmem_locate_table()

For both romstage and ramstage, this calls an arch-specific function
get_cbmem_table() to resolve the base and size of CBMEM region. In ramstage,
the result is cached as the query may be relatively slow involving multiple PCI
configuration reads.

For x86 CBMEM tables are located right below top of low ram and
have fixed size of HIGH_MEMORY_SIZE in EARLY_CBMEM_INIT implementation.

Change-Id: Ie8d16eb30cd5c3860fff243f36bd4e7d8827a782
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3558
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

5 files changed, 60 insertions, 23 deletions

diff --git a/src/arch/armv7/tables.c b/src/arch/armv7/tables.c
index de6b6facc3..b566ff6130 100644
--- a/src/arch/armv7/tables.c
+++ b/src/arch/armv7/tables.c
@@ -29,6 +29,13 @@
 
 #define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
 
+void __attribute__((weak)) get_cbmem_table(uint64_t *base, uint64_t *size)
+{
+	printk(BIOS_WARNING, "WARNING: you need to define get_cbmem_table for your board\n");
+	*base = 0;
+	*size = 0;
+}
+
 void cbmem_arch_init(void)
 {
 }
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 9334839a62..d3a5f2163c 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -1,3 +1,5 @@
+romstage-y += cbmem.c
+
 ramstage-y += boot.c
 ramstage-$(CONFIG_MULTIBOOT) += multiboot.c
 ramstage-y += gdt.c
diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c
index 6ec005d183..333ca55ccf 100644
--- a/src/arch/x86/boot/cbmem.c
+++ b/src/arch/x86/boot/cbmem.c
@@ -18,7 +18,28 @@
 #include <console/console.h>
 #include <cbmem.h>
 
+unsigned long __attribute__((weak)) get_top_of_ram(void)
+{
+	printk(BIOS_WARNING, "WARNING: you need to define get_top_of_ram() for your chipset\n");
+	return 0;
+}
+
 #if !CONFIG_DYNAMIC_CBMEM
+void get_cbmem_table(uint64_t *base, uint64_t *size)
+{
+	uint64_t top_of_ram = get_top_of_ram();
+
+	if (top_of_ram >= HIGH_MEMORY_SIZE) {
+		*base = top_of_ram - HIGH_MEMORY_SIZE;
+		*size = HIGH_MEMORY_SIZE;
+	} else {
+		*base = 0;
+		*size = 0;
+	}
+}
+#endif
+
+#if !CONFIG_DYNAMIC_CBMEM && !defined(__PRE_RAM__)
 /* This is for compatibility with old boards only. Any new chipset and board
  * must implement get_top_of_ram() for both romstage and ramstage to support
  * features like CAR_MIGRATION and CBMEM_CONSOLE.
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 96b9da8c5a..4ee0b2ed1d 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -140,6 +140,7 @@ int cbmem_base_check(void);
 void cbmem_init(u64 baseaddr, u64 size);
 int cbmem_reinit(u64 baseaddr);
 
+void get_cbmem_table(uint64_t *base, uint64_t *size);
 extern struct cbmem_entry *get_cbmem_toc(void);
 
 #endif /* CONFIG_DYNAMIC_CBMEM */
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index 41d80b8f85..c5a11e3907 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -45,30 +45,46 @@ struct cbmem_entry {
 #ifndef __PRE_RAM__
 uint64_t high_tables_base = 0;
 uint64_t high_tables_size = 0;
-static struct cbmem_entry *bss_cbmem_toc;
 
-struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
+void __attribute__((weak)) set_cbmem_toc(struct cbmem_entry * x)
 {
-	return bss_cbmem_toc;
+	/* do nothing, this should be called by chipset to save TOC in NVRAM */
 }
 
-void __attribute__((weak)) set_cbmem_toc(struct cbmem_entry * x)
+static void cbmem_trace_location(uint64_t base, uint64_t size, const char *s)
 {
-	/* do nothing, this should be called by chipset to save TOC in NVRAM */
+	if (base && size && s) {
+		printk(BIOS_DEBUG, "CBMEM region %llx-%llx (%s)\n",
+			base, base + size - 1, s);
+	}
 }
+#endif
+
+static void cbmem_locate_table(uint64_t *base, uint64_t *size)
+{
+#ifdef __PRE_RAM__
+	get_cbmem_table(base, size);
 #else
+	if (!(high_tables_base && high_tables_size)) {
+		get_cbmem_table(&high_tables_base, &high_tables_size);
+		cbmem_trace_location(high_tables_base, high_tables_size, __FUNCTION__);
+	}
+	*base = high_tables_base;
+	*size = high_tables_size;
+#endif
+}
 
 struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
 {
-	printk(BIOS_WARNING, "WARNING: you need to define get_cbmem_toc() for your chipset\n");
-	return NULL;
+	uint64_t base, size;
+	cbmem_locate_table(&base, &size);
+	return (struct cbmem_entry *)(unsigned long)base;
 }
-#endif
 
 #if !defined(__PRE_RAM__)
 void cbmem_late_set_table(uint64_t base, uint64_t size)
 {
-	printk(BIOS_DEBUG, "CBMEM region %llx-%llx (%s)\n", base, base+size-1, __FUNCTION__);
+	cbmem_trace_location(base, size, __FUNCTION__);
 	high_tables_base = base;
 	high_tables_size = size;
 }
@@ -89,10 +105,6 @@ void cbmem_init(u64 baseaddr, u64 size)
 	struct cbmem_entry *cbmem_toc;
 	cbmem_toc = (struct cbmem_entry *)(unsigned long)baseaddr;
 
-#ifndef __PRE_RAM__
-	bss_cbmem_toc = cbmem_toc;
-#endif
-
 	printk(BIOS_DEBUG, "Initializing CBMEM area to 0x%llx (%lld bytes)\n",
 	       baseaddr, size);
 
@@ -123,10 +135,6 @@ int cbmem_reinit(u64 baseaddr)
 	printk(BIOS_DEBUG, "Re-Initializing CBMEM area to 0x%lx\n",
 	       (unsigned long)baseaddr);
 
-#ifndef __PRE_RAM__
-	bss_cbmem_toc = cbmem_toc;
-#endif
-
 	return (cbmem_toc[0].magic == CBMEM_MAGIC);
 }
 
@@ -219,21 +227,19 @@ void *cbmem_find(u32 id)
 /* Returns True if it was not initialized before. */
 int cbmem_initialize(void)
 {
+	uint64_t base = 0, size = 0;
 	int rv = 0;
 
-#ifdef __PRE_RAM__
-	uint64_t high_tables_base = get_top_of_ram() - HIGH_MEMORY_SIZE;
-	uint64_t high_tables_size = HIGH_MEMORY_SIZE;
-#endif
+	cbmem_locate_table(&base, &size);
 
 	/* We expect the romstage to always initialize it. */
-	if (!cbmem_reinit(high_tables_base)) {
+	if (!cbmem_reinit(base)) {
 #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
 		/* Something went wrong, our high memory area got wiped */
 		if (acpi_slp_type == 3 || acpi_slp_type == 2)
 			acpi_slp_type = 0;
 #endif
-		cbmem_init(high_tables_base, high_tables_size);
+		cbmem_init(base, size);
 		rv = 1;
 	}
 #ifndef __PRE_RAM__