diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-11 13:20:43 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-12 14:17:32 +0000 |
commit | baec560c7a6178edb9ba1e4d1d1bd6aee1852d0d (patch) | |
tree | 724bb844006fd3e8eedb0a735c804575a146a8e5 | |
parent | 501b71e7bb1370bbd079169dae0cf3d779fc4276 (diff) |
treewide: Use 'gpe0_blk_len' for 'x_gpe0_blk.bit_width'
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I581cacb6086d94fe65e6f4800454f447e1ada07b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r-- | src/soc/amd/cezanne/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/mendocino/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/morgana/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/picasso/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/acpi.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/agesa/hudson/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/pi/hudson/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801dx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ix/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801jx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/fadt.c | 2 |
14 files changed, 14 insertions, 14 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 5eda491c87..3f7a00ff25 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -124,7 +124,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 98b4bdf399..54e3424611 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -126,7 +126,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/soc/amd/morgana/acpi.c b/src/soc/amd/morgana/acpi.c index c3671ff935..003c4ead90 100644 --- a/src/soc/amd/morgana/acpi.c +++ b/src/soc/amd/morgana/acpi.c @@ -127,7 +127,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 976ca53ff6..b4ee23b2fd 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -132,7 +132,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 94f9da73a8..246581e696 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -124,7 +124,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index de9cbea51a..acf3e69ca0 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -86,7 +86,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 88c488c91b..439abed59f 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -117,7 +117,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = GPE0_BLK_ADDRESS; diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 2caea29645..eb79f9f7aa 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -89,7 +89,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index 7db79687c0..8889ba9752 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -80,7 +80,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 128; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index 12cbf55e34..b70808f650 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -72,7 +72,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_UNDEFINED; fadt->x_gpe0_blk.addrl = pmbase + 0x28; diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c index d28edf3501..c3fbf68fac 100644 --- a/src/southbridge/intel/i82801gx/fadt.c +++ b/src/southbridge/intel/i82801gx/fadt.c @@ -79,7 +79,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index 7275867103..2e1c8150ed 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -70,7 +70,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 128; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index f6c934d8f5..3ee504c6e0 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -70,7 +70,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 128; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index 112d3e9993..21daad92e6 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -79,7 +79,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrh = 0x0; fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; - fadt->x_gpe0_blk.bit_width = 128; + fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; |