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authorArthur Heymans <arthur@aheymans.xyz>2021-03-01 19:06:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-03 09:01:04 +0000
commitbab7f18a434a56d152980ec0e50aabd09ee64bf8 (patch)
tree00e9178195cb89ad418c5a0afa28b1a8d735da36
parent6d9af0ce6e340e73f3189bfc1091711892754371 (diff)
mb/*/*: Don't select PCIEXP_HOTPLUG
PCIEXP_HOTPLUG has a prompt and as such is not supposed to be forced. Just change the default value to 'y'. Change-Id: Ie4248700f5ab5168bff551b740d347713273763c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/google/volteer/Kconfig4
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig4
-rw-r--r--src/mainboard/intel/tglrvp/Kconfig4
3 files changed, 9 insertions, 3 deletions
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig
index ddfd704f0a..79f50aa503 100644
--- a/src/mainboard/google/volteer/Kconfig
+++ b/src/mainboard/google/volteer/Kconfig
@@ -30,7 +30,6 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50
select MAINBOARD_HAS_TPM2
- select PCIEXP_HOTPLUG
select SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_TIGERLAKE
select HAVE_SPD_IN_CBFS
@@ -112,6 +111,9 @@ config MAX_CPUS
int
default 8
+config PCIEXP_HOTPLUG
+ default y
+
# Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569)
# Revision 0.7.6 Section 7.2.5.1.5
config PCIEXP_HOTPLUG_BUSES
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 91a18d9989..295b56fa58 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
select HAVE_SPD_IN_CBFS
select DRIVERS_SOUNDWIRE_ALC711
- select PCIEXP_HOTPLUG
config CHROMEOS
select GBB_FLAG_FORCE_DEV_SWITCH_ON
@@ -85,6 +84,9 @@ config ADL_INTEL_EC
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT
endchoice
+config PCIEXP_HOTPLUG
+ default y
+
config PCIEXP_HOTPLUG_BUSES
int
default 42
diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig
index 233706d949..bbdaf792e6 100644
--- a/src/mainboard/intel/tglrvp/Kconfig
+++ b/src/mainboard/intel/tglrvp/Kconfig
@@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_LPSS_UART_FOR_CONSOLE
select DRIVERS_INTEL_ISH
select EC_ACPI
- select PCIEXP_HOTPLUG
select HAVE_SPD_IN_CBFS
select SOC_INTEL_CSE_LITE_SKU
select MAINBOARD_HAS_TPM2
@@ -61,6 +60,9 @@ config MAX_CPUS
int
default 8
+config PCIEXP_HOTPLUG
+ default y
+
config PCIEXP_HOTPLUG_BUSES
int
default 42