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authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-04-28 13:15:36 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2022-07-11 08:58:41 +0000
commitba9b2b74656699ec8354f55fb7d79bd0fd30d1dc (patch)
treedef6205be7a0f6011b23da7557efef04f5b7162c
parentf0f8a5fda830f9fc160cc1682f3805c9d5ee926e (diff)
mainboard/msi/ms7d25: Add NCT6687D configuration
TEST=Boot Ubuntu 22.04, load nct6687 kernel module and use lm-sensors to display information about sensors on the SIO EC. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I55445a94f0de3510324b12558c4343e819412ac0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63928 Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/msi/ms7d25/acpi/superio.asl9
-rw-r--r--src/mainboard/msi/ms7d25/bootblock.c2
-rw-r--r--src/mainboard/msi/ms7d25/devicetree.cb31
-rw-r--r--src/mainboard/msi/ms7d25/dsdt.asl5
4 files changed, 47 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms7d25/acpi/superio.asl b/src/mainboard/msi/ms7d25/acpi/superio.asl
new file mode 100644
index 0000000000..35c6bce088
--- /dev/null
+++ b/src/mainboard/msi/ms7d25/acpi/superio.asl
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#define SUPERIO_DEV SIO0
+#define SUPERIO_PNP_BASE 0x4e
+#define NCT6687D_SHOW_SP1
+#define NCT6687D_SHOW_KBC
+#define NCT6687D_SHOW_EC
+
+#include <superio/nuvoton/nct6687d/acpi/superio.asl>
diff --git a/src/mainboard/msi/ms7d25/bootblock.c b/src/mainboard/msi/ms7d25/bootblock.c
index cbadfb59c6..2dcb763827 100644
--- a/src/mainboard/msi/ms7d25/bootblock.c
+++ b/src/mainboard/msi/ms7d25/bootblock.c
@@ -11,6 +11,8 @@ void bootblock_mainboard_early_init(void)
{
/* Replicate vendor settings for multi-function pins in global config LDN */
nuvoton_pnp_enter_conf_state(SERIAL_DEV);
+ pnp_write_config(SERIAL_DEV, 0x13, 0xff); // IRQ8-15 level triggered, low
+ pnp_write_config(SERIAL_DEV, 0x14, 0xff); // IRQ0-7 level triggered, low
pnp_write_config(SERIAL_DEV, 0x15, 0xaa);
pnp_write_config(SERIAL_DEV, 0x1a, 0x02);
pnp_write_config(SERIAL_DEV, 0x1b, 0x02);
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
index 770923f02e..ba144f8dcd 100644
--- a/src/mainboard/msi/ms7d25/devicetree.cb
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -216,6 +216,37 @@ chip soc/intel/alderlake
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther"
"M2_2" "SlotDataBusWidth4X"
end
+ device ref pch_espi on
+ chip superio/nuvoton/nct6687d
+ device pnp 4e.1 off end # Parallel port
+ device pnp 4e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 4e.3 off end # COM2, IR
+ device pnp 4e.5 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 4e.6 off end # CIR
+ device pnp 4e.7 off end # GPIO0-7
+ device pnp 4e.8 off end # P80 UART
+ device pnp 4e.9 off end # GPIO8-9, GPIO1-8 AF
+ device pnp 4e.a on # ACPI
+ # Vendor firmware did not assign I/O and IRQ
+ end
+ device pnp 4e.b on # EC
+ io 0x60 = 0xa20
+ # Vendor firmware did not assign IRQ
+ end
+ device pnp 4e.c off end # RTC
+ device pnp 4e.d off end # Deep Sleep
+ device pnp 4e.e off end # TACH/PWM assignment
+ device pnp 4e.f off end # Function register
+ end
+ end
device ref p2sb on end
device ref hda on
subsystemid 0x1462 0x9d25
diff --git a/src/mainboard/msi/ms7d25/dsdt.asl b/src/mainboard/msi/ms7d25/dsdt.asl
index 9e4ce01513..061b36876b 100644
--- a/src/mainboard/msi/ms7d25/dsdt.asl
+++ b/src/mainboard/msi/ms7d25/dsdt.asl
@@ -24,5 +24,10 @@ DefinitionBlock(
#include <soc/intel/alderlake/acpi/southbridge.asl>
}
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include "acpi/superio.asl"
+ }
+
#include <southbridge/intel/common/acpi/sleepstates.asl>
}