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authorFelix Held <felix-coreboot@felixheld.de>2020-11-13 23:42:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-11-16 08:11:18 +0000
commitaa003fecfdcc406f430a7e12a028db3b62e241b3 (patch)
tree08c2010be6d69212dfb92ccfc216e59c61c80718
parentf3c0a01dc6c4b07af8320f083d9b21e65299e0ed (diff)
soc/amd/picasso/include/amd_pci_int_defs: remove duplicate comment
This also reduces the difference to the equivalent file from stoneyridge. Change-Id: I3fc44f057047995cc4054a85a1bb69427aa28531 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47581 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/picasso/include/soc/amd_pci_int_defs.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/include/soc/amd_pci_int_defs.h b/src/soc/amd/picasso/include/soc/amd_pci_int_defs.h
index b423f79b0e..3082287031 100644
--- a/src/soc/amd/picasso/include/soc/amd_pci_int_defs.h
+++ b/src/soc/amd/picasso/include/soc/amd_pci_int_defs.h
@@ -7,10 +7,7 @@
* PIRQ and device routing - these define the index into the
* FCH PCI_INTR 0xC00/0xC01 interrupt routing table.
*/
-/*
- * PIRQ and device routing - these define the index into the
- * FCH PCI_INTR 0xC00/0xC01 interrupt routing table.
- */
+
#define PIRQ_NC 0x1f /* Not Used */
#define PIRQ_A 0x00 /* INT A */
#define PIRQ_B 0x01 /* INT B */