diff options
| author | zhaojohn <john.zhao@intel.com> | 2022-09-22 20:33:57 -0700 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2022-11-04 20:35:34 +0000 |
| commit | a923a431c6f10da70bec075583d4eb9ddaccacac (patch) | |
| tree | 91066037a368a24340a4248f955c25c876fcd52d | |
| parent | 8c740b08a373163cda73973b63ae70685458d56b (diff) | |
soc/intel/meteorlake: Provide mitigation support for CNVi RFI
The DDR RFIM is a frequency shifting RFI mitigation feature required by
the Intel integrated Wi-Fi firmware(CNVi) for Meteor Lake. Please refer
to Intel technical white paper 640438_Intel_DDR_Mem_RFIM_Policy_Enable
once it is externally available. This change has backport changes from
commit hash 6f73a20 (soc/intel/alderlake: Move CnviDdrRfim property to
drivers) and provides the CNVi RFIM support for Meteor Lake.
BUG=b:248391777
TEST=Booted to OS on Rex. Looked the DDR_DVFS_RFI_CONFIG_PCU_REG
register at the offset 0x5A40 of Mchbar and verified the BIT0
(RFI_DISABLE bit) is 0.
Change-Id: I87110bc10b98a27a8f274680597b15a1df488824
Signed-off-by: zhaojohn <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67789
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/soc/intel/meteorlake/romstage/fsp_params.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 0ca37564ae..0b7e79e6f1 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -5,6 +5,7 @@ #include <cpu/intel/cpu_ids.h> #include <cpu/x86/msr.h> #include <device/device.h> +#include <drivers/wifi/generic/wifi.h> #include <fsp/fsp_debug_event.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> @@ -199,6 +200,19 @@ static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg, memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable)); } +static void fill_fspm_cnvi_params(FSP_M_CONFIG *m_cfg, + const struct soc_intel_meteorlake_config *config) +{ + /* CNVi DDR RFI Mitigation */ + const struct device_path path[] = { + { .type = DEVICE_PATH_PCI, .pci.devfn = PCI_DEVFN_CNVI_WIFI }, + { .type = DEVICE_PATH_GENERIC, .generic.id = 0 } }; + const struct device *dev = find_dev_nested_path(pci_root_bus(), path, + ARRAY_SIZE(path)); + if (is_dev_enabled(dev)) + m_cfg->CnviDdrRfim = wifi_generic_cnvi_ddr_rfim_enabled(dev); +} + static void fill_fspm_ish_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_meteorlake_config *config) { @@ -281,6 +295,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, fill_fspm_smbus_params, fill_fspm_misc_params, fill_fspm_audio_params, + fill_fspm_cnvi_params, fill_fspm_pcie_rp_params, fill_fspm_ish_params, fill_fspm_tcss_params, |