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authorRaul E Rangel <rrangel@chromium.org>2021-04-19 17:09:30 -0600
committerRaul Rangel <rrangel@chromium.org>2021-04-21 22:27:39 +0000
commita89a4ea8ea04aaf369cd99f487f3537fe9e46702 (patch)
treef020a986873b7b5617321d50219eac01d133408d
parente3f7645a8bb50b63200a14d79b3f4b8a94015691 (diff)
soc/amd/{cezanne,common}/acpi: Add _OSC method
The linux kernel requires a valid _OSC method. Otherwise the _LPI table is ignored. See https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/third_party/kernel/v5.10/drivers/acpi/bus.c;l=324 Before this patch: acpi_processor_get_lpi_info: LPI is not supported After this patch: acpi_processor_evaluate_lpi: ACPI: \_SB_.CP00: ACPI: Found 4 power states BUG=b:178728116 TEST=Boot OS and verify _LPI table is parsed Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I44e554b9db6f70fdd1559105cdaee53aeb2bfbf5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52528 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
-rw-r--r--src/soc/amd/cezanne/acpi/soc.asl2
-rw-r--r--src/soc/amd/common/acpi/osc.asl22
2 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index be511042e4..f7781dab2e 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -8,6 +8,8 @@ Scope(\_SB) {
#include <soc/amd/common/acpi/gpio_bank_lib.asl>
+ #include <soc/amd/common/acpi/osc.asl>
+
#include "pci_int_defs.asl"
#include "mmio.asl"
diff --git a/src/soc/amd/common/acpi/osc.asl b/src/soc/amd/common/acpi/osc.asl
new file mode 100644
index 0000000000..22175caa45
--- /dev/null
+++ b/src/soc/amd/common/acpi/osc.asl
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_osc.h>
+
+/*
+ * Platform-Wide _OSC Operating System Capabilities
+ *
+ * Arg0: A Buffer containing a UUID
+ * Arg1: An Integer containing a Revision ID of the buffer format
+ * Arg2: An Integer containing a count of entries in Arg3
+ * Arg3: A Buffer containing a list of DWORD capabilities
+ */
+Method (_OSC, 4, NotSerialized) {
+ CreateDWordField (Arg3, 0, CDW1)
+ If (Arg0 == ToUUID (OSC_SB_UUID)) {
+ /* Don't mask any capability bits off. */
+ Return (Arg3)
+ } Else {
+ CDW1 |= OSC_CDW1_UNRECOGNIZED_UUID
+ Return (Arg3)
+ }
+}