diff options
author | Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> | 2016-11-15 12:06:21 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-11-17 18:48:14 +0100 |
commit | 9f2a411042c11d89d8e0a9c5459f5a250a505486 (patch) | |
tree | 8096278d35e93650aab64df44aae740fa6be1fe9 | |
parent | df921ff7ae1aba649099d44f21b79d2ff46ebc5a (diff) |
mainboard/google/reef: disable unused devices
The following devices i2c6, i2c7, spi1, spi2, uart3
are not used.
BUG=chrome-os-partner:59880
TEST=Boot to OS and lspci command should
not list the above disabled devices.
Change-Id: I819cdb34709703e6431b49446417ed9d6b3543cd
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://review.coreboot.org/17441
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/mainboard/google/reef/variants/baseboard/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index 263255f328..fa097fd79b 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -204,15 +204,15 @@ chip soc/intel/apollolake device i2c 0x9 on end end end # - I2C 5 - device pci 17.2 on end # - I2C 6 - device pci 17.3 on end # - I2C 7 + device pci 17.2 off end # - I2C 6 + device pci 17.3 off end # - I2C 7 device pci 18.0 on end # - UART 0 device pci 18.1 on end # - UART 1 device pci 18.2 on end # - UART 2 - device pci 18.3 on end # - UART 3 + device pci 18.3 off end # - UART 3 device pci 19.0 on end # - SPI 0 - device pci 19.1 on end # - SPI 1 - device pci 19.2 on end # - SPI 2 + device pci 19.1 off end # - SPI 1 + device pci 19.2 off end # - SPI 2 device pci 1a.0 on end # - PWM device pci 1b.0 on end # - SDCARD device pci 1c.0 on end # - eMMC |