diff options
author | Jan Samek <jan.samek@siemens.com> | 2023-01-19 14:05:50 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-22 00:29:36 +0000 |
commit | 9d67142ccbb3421275c6aa8b44b4cbbec78054a7 (patch) | |
tree | 960ea3fe007a56be5081622083aab90108d8165f | |
parent | 105d3091f928376f190320ce614b891a8c84f673 (diff) |
mb/siemens/mc_apl1: Move POST logic to mainboard level
Move logic previously used only in the mc_apl2 variant to
the mainboard level so that other variants can also make
use of it without code duplication.
This functionality on the mc_apl6 variant will be enabled
in a follow-up patch.
BUG=none
TEST=Boot on siemens/mc_apl2 and observe that the POST
codes are displayed before DRAM training.
Change-Id: I762e328ad06c047d911ce1fc40f12a66cbd14e11
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
-rw-r--r-- | src/mainboard/siemens/mc_apl1/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/siemens/mc_apl1/post.c (renamed from src/mainboard/siemens/mc_apl1/variants/mc_apl2/post.c) | 0 | ||||
-rw-r--r-- | src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc | 2 |
3 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/siemens/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/Makefile.inc index fa7aea9049..124e3806ff 100644 --- a/src/mainboard/siemens/mc_apl1/Makefile.inc +++ b/src/mainboard/siemens/mc_apl1/Makefile.inc @@ -7,6 +7,8 @@ romstage-y += romstage.c ramstage-y += mainboard.c +all-$(CONFIG_NC_FPGA_POST_CODE) += post.c + subdirs-y += variants/baseboard CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/post.c b/src/mainboard/siemens/mc_apl1/post.c index c34e2539bc..c34e2539bc 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/post.c +++ b/src/mainboard/siemens/mc_apl1/post.c diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc index 9ec2c8024f..152b46ece1 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc @@ -2,5 +2,3 @@ bootblock-y += gpio.c ramstage-y += gpio.c ramstage-y += mainboard.c - -all-$(CONFIG_NC_FPGA_POST_CODE) += post.c |