diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-06 07:08:46 +0100 |
---|---|---|
committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-06 11:19:28 +0100 |
commit | 9b29aad5263f2aeba21cf4d521e7798f9dedb2b9 (patch) | |
tree | e513c718c9cb6960c4be58d2e5c299a0bab968f7 | |
parent | 6355cbff51966144d5b709a73e24622df3e96122 (diff) |
Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"
This reverts commit 9270553fff23462fcb298f154296319bf3639d15.
Change-Id: I195f721ce7a18aac6c1aa6f4e0f9284455d531b0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8138
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
-rw-r--r-- | src/drivers/intel/fsp/fastboot_cache.c | 13 | ||||
-rw-r--r-- | src/include/spi_flash.h | 11 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/mrccache.c | 7 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/mrccache.c | 7 | ||||
-rw-r--r-- | src/soc/intel/common/nvm.c | 10 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/nvm.c | 13 |
6 files changed, 42 insertions, 19 deletions
diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp/fastboot_cache.c index 907e143a55..64982d8dc1 100644 --- a/src/drivers/intel/fsp/fastboot_cache.c +++ b/src/drivers/intel/fsp/fastboot_cache.c @@ -31,6 +31,15 @@ #include <lib.h> // hexdump #include "fsp_util.h" +#ifndef CONFIG_VIRTUAL_ROM_SIZE +#error "CONFIG_VIRTUAL_ROM_SIZE must be set." +#endif + +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(void *p) { + return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); +} + static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -196,7 +205,7 @@ void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base); - flash->erase(flash, to_flash_offset(flash, cache_base), cache_size); + flash->erase(flash, to_flash_offset(cache_base), cache_size); /* we will start at the beginning again */ cache = cache_base; @@ -204,7 +213,7 @@ void update_mrc_cache(void *unused) /* 4. write mrc data with flash->write() */ printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n", cache); - flash->write(flash, to_flash_offset(flash, cache), + flash->write(flash, to_flash_offset(cache), current->mrc_data_size + sizeof(*current), current); } diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 8ac7912f91..7e430d0788 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -76,15 +76,4 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, return flash->erase(flash, offset, len); } -#if !defined(__PRE_RAM__) -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { -#if defined(CONFIG_VIRTUAL_ROM_SIZE) - return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); -#else - return ((u32)p + flash->size); -#endif /* defined(CONFIG_VIRTUAL_ROM_SIZE) */ -} -#endif /* !defined(__PRE_RAM__) */ - #endif /* _SPI_FLASH_H_ */ diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index 88af78973d..a921e048dd 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -33,6 +33,11 @@ #include <vendorcode/google/chromeos/fmap.h> #endif +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); +} + static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -223,7 +228,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif /* !defined(__PRE_RAM__) */ +#endif struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index 664fb7fbfd..c84ff82b80 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -33,6 +33,11 @@ #include <vendorcode/google/chromeos/fmap.h> #endif +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); +} + static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -222,7 +227,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif /* !defined(__PRE_RAM__) */ +#endif struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c index 54b3baf821..791422fe30 100644 --- a/src/soc/intel/common/nvm.c +++ b/src/soc/intel/common/nvm.c @@ -46,6 +46,12 @@ static int nvm_init(void) return 0; } +/* Convert memory mapped pointer to flash offset. */ +static inline uint32_t to_flash_offset(void *p) +{ + return CONFIG_ROM_SIZE + (uintptr_t)p; +} + int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -64,7 +70,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - return flash->erase(flash, to_flash_offset(flash, start), size); + return flash->erase(flash, to_flash_offset(start), size); } /* Write data to NVM. Returns 0 on success < 0 on error. */ @@ -72,5 +78,5 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - return flash->write(flash, to_flash_offset(flash, start), size, data); + return flash->write(flash, to_flash_offset(start), size, data); } diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c index d1e5223996..02244636f8 100644 --- a/src/soc/intel/fsp_baytrail/nvm.c +++ b/src/soc/intel/fsp_baytrail/nvm.c @@ -47,6 +47,15 @@ static int nvm_init(void) return 0; } +/* Convert memory mapped pointer to flash offset. */ +static inline uint32_t to_flash_offset(void *p) +{ +#ifndef CONFIG_ROM_SIZE +#error CONFIG_ROM_SIZE must be set. +#endif + return CONFIG_ROM_SIZE + (uintptr_t)p; +} + int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -65,7 +74,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - flash->erase(flash, to_flash_offset(flash, start), size); + flash->erase(flash, to_flash_offset(start), size); return 0; } @@ -74,6 +83,6 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - flash->write(flash, to_flash_offset(flash, start), size, data); + flash->write(flash, to_flash_offset(start), size, data); return 0; } |