diff options
| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-08-21 13:40:23 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-28 15:12:14 +0000 |
| commit | 990d825196227190d3625c3b44a082816748bc3b (patch) | |
| tree | cb3cddae59d43301f5eed8253964ef16d5b1ebab | |
| parent | fdcc0b39156f915cdc8ee7221fca6d8640545f25 (diff) | |
google/kukui: Init SPI bus for EC
Set EC SPI bus config and init SPI bus according to the config.
BUG=b:80501386
BRANCH=none
TEST=EC is not working yet. This makes depthcharge go forward a little.
Change-Id: Id9209b6429417430cfcf7f5a5a1659e7e4bc7866
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/28251
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/kukui/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/google/kukui/bootblock.c | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig index 6714b442fa..9e0146413c 100644 --- a/src/mainboard/google/kukui/Kconfig +++ b/src/mainboard/google/kukui/Kconfig @@ -25,4 +25,8 @@ config BOOT_DEVICE_SPI_FLASH_BUS int default 1 +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0x2 + endif diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c index fa51488501..a9bad4e0bc 100644 --- a/src/mainboard/google/kukui/bootblock.c +++ b/src/mainboard/google/kukui/bootblock.c @@ -29,5 +29,6 @@ void bootblock_mainboard_init(void) /* Turn on real eMMC. */ gpio_output(BOOTBLOCK_EN_L, 1); + mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz); mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz); } |