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authorNick Vaccaro <nvaccaro@google.com>2021-03-19 13:25:40 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-03-22 11:26:40 +0000
commit96094b31e925f38455e2d983991305111de068f0 (patch)
treeb7fd028765e29ead0e12736be23505496d7daaee
parent88f94a9635cd64aaf6eeb3ed3991dceabcf6387a (diff)
util: Add DDR4 generic SPD for H4AAG165WB-BCWE
Add SPD support for DDR4 memory part H4AAG165WB-BCWE. BUG=b:181732562 TEST=none Change-Id: I923fcbd08875a2a581fba4b1db00a4d1c1bb11cf Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51666 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt1
-rw-r--r--util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt14
2 files changed, 14 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
index 21565c66b6..96fb261789 100644
--- a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
+++ b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
@@ -14,3 +14,4 @@ H5AN8G6NCJR-XNC,ddr4-spd-1.hex
K4AAG165WA-BCTD,ddr4-spd-8.hex
H5ANAG6NDMR-XNC,ddr4-spd-2.hex
H5ANAG6NCJR-XNC,ddr4-spd-9.hex
+K4AAG165WB-BCWE,ddr4-spd-9.hex
diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
index 72b0ccd9aa..b6e0ab1059 100644
--- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
+++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
@@ -203,6 +203,18 @@
"packageBusWidth": 16,
"ranksPerPackage": 1
}
- }
+ },
+ {
+ // Datasheet Revision: Rev. 0.0, Apr. 2020
+ "name": "K4AAG165WB-BCWE",
+ "attribs": {
+ "speedMTps": 3200,
+ "CL_nRCD_nRP": 22,
+ "capacityPerDieGb": 16,
+ "diesPerPackage": 1,
+ "packageBusWidth": 16,
+ "ranksPerPackage": 1
+ }
+ }
]
}