summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2023-09-20 19:28:41 +0000
committerSubrata Banik <subratabanik@google.com>2023-10-04 18:50:32 +0000
commit913ea97fbe0907a86e221a9553b21fcc7aecff57 (patch)
treea3c64ce6710af1d96584a129dca5fa20a0fac285
parent1858903e780391cac0f37157f5de821b508d4e8d (diff)
soc/intel: Select GMA v2 for ADL, MTL, TGL to reflect port/pipe defs
Intel GFX IP TRANS_DDI_FUNC_CTL register bit definitions have changed since Tiger Lake. This register is used to map ports and pipes to display controllers, so reflecting the correct status is important for detecting physical display end point devices. This patch ensures that ADL, MTL, and TGL SoCs choose GMA version 2 to properly reflect the updated port and pipe register definitions. BUG=b:299137940 TEST=Build and boot google/rex successfully. Change-Id: Ie2082747d18a5f136f410b1019be4d6c801617b1 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78079 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Eric Lai <ericllai@google.com>
-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/meteorlake/Kconfig1
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 038d57ca63..82ec8f263e 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -29,6 +29,7 @@ config SOC_INTEL_ALDERLAKE
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select INTEL_GMA_OPREGION_2_1
+ select INTEL_GMA_VERSION_2
select INTEL_TXT_LIB
select MP_SERVICES_PPI_V2
select MRC_SETTINGS_PROTECT
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 28618f6b04..48030a1911 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -31,6 +31,7 @@ config SOC_INTEL_METEORLAKE
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select INTEL_GMA_OPREGION_2_1
+ select INTEL_GMA_VERSION_2
select IOAPIC
select MICROCODE_BLOB_UNDISCLOSED
select MP_SERVICES_PPI_V2
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index df8f5a2760..0a4b7bfdb8 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -29,6 +29,7 @@ config SOC_INTEL_TIGERLAKE
select SF_MASK_2WAYS_PER_BIT if INTEL_CAR_NEM_ENHANCED
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
+ select INTEL_GMA_VERSION_2
select MP_SERVICES_PPI_V1
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK