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authorFelix Held <felix-coreboot@felixheld.de>2023-01-16 20:06:31 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-01-17 19:26:16 +0000
commit8f2e5c90e44c6d846a6367bb4051818fdcd577ea (patch)
tree72065a0be92863fecb355e562dc2cd4d1703d844
parentd4cc902c57ca6e57ebf27e8fc63748f984a1d868 (diff)
soc/amd: introduce and use common amd_cpu_bus_ops struct
The device operations for the CPU bus are identical for all AMD SoCs, so introduce a common device operations struct for this and use it in all AMD SoC's chipset devicetrees as ops for the CPU cluster. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id32f89b8a33db8dbb747b917eeac3009fbae6631 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
-rw-r--r--src/soc/amd/cezanne/chip.c7
-rw-r--r--src/soc/amd/cezanne/chipset.cb2
-rw-r--r--src/soc/amd/common/block/cpu/cpu.c9
-rw-r--r--src/soc/amd/glinda/chip.c7
-rw-r--r--src/soc/amd/glinda/chipset.cb2
-rw-r--r--src/soc/amd/mendocino/chip.c7
-rw-r--r--src/soc/amd/mendocino/chipset_mendocino.cb2
-rw-r--r--src/soc/amd/mendocino/chipset_rembrandt.cb2
-rw-r--r--src/soc/amd/phoenix/chip.c7
-rw-r--r--src/soc/amd/phoenix/chipset.cb2
-rw-r--r--src/soc/amd/picasso/chip.c7
-rw-r--r--src/soc/amd/picasso/chipset.cb2
-rw-r--r--src/soc/amd/stoneyridge/chip.c7
-rw-r--r--src/soc/amd/stoneyridge/chipset_cz.cb2
-rw-r--r--src/soc/amd/stoneyridge/chipset_st.cb2
15 files changed, 17 insertions, 50 deletions
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index efef2f19c9..d480cc563b 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -12,13 +12,6 @@
#include <types.h>
#include "chip.h"
-struct device_operations cezanne_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index f0a3d861d0..691153f87b 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -1,6 +1,6 @@
chip soc/amd/cezanne
device cpu_cluster 0 on
- ops cezanne_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops cezanne_pci_domain_ops
diff --git a/src/soc/amd/common/block/cpu/cpu.c b/src/soc/amd/common/block/cpu/cpu.c
index 7c1daf96f1..1e1915f98f 100644
--- a/src/soc/amd/common/block/cpu/cpu.c
+++ b/src/soc/amd/common/block/cpu/cpu.c
@@ -1,9 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <acpi/acpi.h>
#include <amdblocks/cpu.h>
#include <cpu/cpu.h>
+#include <device/device.h>
int get_cpu_count(void)
{
return 1 + (cpuid_ecx(0x80000008) & 0xff);
}
+
+struct device_operations amd_cpu_bus_ops = {
+ .read_resources = noop_read_resources,
+ .set_resources = noop_set_resources,
+ .init = mp_cpu_bus_init,
+ .acpi_fill_ssdt = generate_cpu_entries,
+};
diff --git a/src/soc/amd/glinda/chip.c b/src/soc/amd/glinda/chip.c
index 9e9ee9eecf..65c9e196bc 100644
--- a/src/soc/amd/glinda/chip.c
+++ b/src/soc/amd/glinda/chip.c
@@ -14,13 +14,6 @@
#include <types.h>
#include "chip.h"
-struct device_operations glinda_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/glinda/chipset.cb b/src/soc/amd/glinda/chipset.cb
index 3b095aaaf4..d54bae0dee 100644
--- a/src/soc/amd/glinda/chipset.cb
+++ b/src/soc/amd/glinda/chipset.cb
@@ -2,7 +2,7 @@
chip soc/amd/glinda
device cpu_cluster 0 on
- ops glinda_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops glinda_pci_domain_ops
diff --git a/src/soc/amd/mendocino/chip.c b/src/soc/amd/mendocino/chip.c
index 83a485f271..fee49a8728 100644
--- a/src/soc/amd/mendocino/chip.c
+++ b/src/soc/amd/mendocino/chip.c
@@ -14,13 +14,6 @@
#include <types.h>
#include "chip.h"
-struct device_operations mendocino_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/mendocino/chipset_mendocino.cb b/src/soc/amd/mendocino/chipset_mendocino.cb
index 29002799da..2ecb240543 100644
--- a/src/soc/amd/mendocino/chipset_mendocino.cb
+++ b/src/soc/amd/mendocino/chipset_mendocino.cb
@@ -1,6 +1,6 @@
chip soc/amd/mendocino
device cpu_cluster 0 on
- ops mendocino_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops mendocino_pci_domain_ops
diff --git a/src/soc/amd/mendocino/chipset_rembrandt.cb b/src/soc/amd/mendocino/chipset_rembrandt.cb
index 29002799da..2ecb240543 100644
--- a/src/soc/amd/mendocino/chipset_rembrandt.cb
+++ b/src/soc/amd/mendocino/chipset_rembrandt.cb
@@ -1,6 +1,6 @@
chip soc/amd/mendocino
device cpu_cluster 0 on
- ops mendocino_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops mendocino_pci_domain_ops
diff --git a/src/soc/amd/phoenix/chip.c b/src/soc/amd/phoenix/chip.c
index 7f0b93f5a8..ee2c7cc913 100644
--- a/src/soc/amd/phoenix/chip.c
+++ b/src/soc/amd/phoenix/chip.c
@@ -14,13 +14,6 @@
#include <types.h>
#include "chip.h"
-struct device_operations phoenix_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/phoenix/chipset.cb b/src/soc/amd/phoenix/chipset.cb
index 0e014391e4..5c341c8783 100644
--- a/src/soc/amd/phoenix/chipset.cb
+++ b/src/soc/amd/phoenix/chipset.cb
@@ -2,7 +2,7 @@
chip soc/amd/phoenix
device cpu_cluster 0 on
- ops phoenix_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops phoenix_pci_domain_ops
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index fc30af9dda..782c1c3a6e 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -13,13 +13,6 @@
#include "chip.h"
#include <fsp/api.h>
-struct device_operations picasso_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb
index 99b025e9c7..6d6177f4b9 100644
--- a/src/soc/amd/picasso/chipset.cb
+++ b/src/soc/amd/picasso/chipset.cb
@@ -2,7 +2,7 @@
chip soc/amd/picasso
device cpu_cluster 0 on
- ops picasso_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops picasso_pci_domain_ops
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index d8ce2243e2..60bc921d93 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -18,13 +18,6 @@
#include "chip.h"
-struct device_operations stoneyridge_cpu_bus_ops = {
- .read_resources = noop_read_resources,
- .set_resources = noop_set_resources,
- .init = mp_cpu_bus_init,
- .acpi_fill_ssdt = generate_cpu_entries,
-};
-
const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb
index dbbbd4d3cf..a3bd85c19f 100644
--- a/src/soc/amd/stoneyridge/chipset_cz.cb
+++ b/src/soc/amd/stoneyridge/chipset_cz.cb
@@ -2,7 +2,7 @@
chip soc/amd/stoneyridge
device cpu_cluster 0 on
- ops stoneyridge_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops stoneyridge_pci_domain_ops
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb
index 4c244d0f0d..c78da61766 100644
--- a/src/soc/amd/stoneyridge/chipset_st.cb
+++ b/src/soc/amd/stoneyridge/chipset_st.cb
@@ -2,7 +2,7 @@
chip soc/amd/stoneyridge
device cpu_cluster 0 on
- ops stoneyridge_cpu_bus_ops
+ ops amd_cpu_bus_ops
end
device domain 0 on
ops stoneyridge_pci_domain_ops