soc/mediatek/mt8188: Add VMCH, VMC support for MT8188

For MT8188, we need to enable and adjust VMCH and VMC to support SD
cards. Therefore, we add VPA and VSIM1 voltage adjustment APIs.

TEST=measure 3.0V in VMCH and VMC.
BUG=b:236331724

Signed-off-by: Hui Liu <hui.liu@mediatek.corp-partner.google.com>
Change-Id: I03938f9ef17a0bdd615bcbbfc7b59fa5acb8fbfb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65874
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 92 insertions, 4 deletions

diff --git a/src/soc/mediatek/common/include/soc/mt6359p.h b/src/soc/mediatek/common/include/soc/mt6359p.h
index 5afac9f47a..a53be634ba 100644
--- a/src/soc/mediatek/common/include/soc/mt6359p.h
+++ b/src/soc/mediatek/common/include/soc/mt6359p.h
@@ -25,12 +25,17 @@ enum {
 	PMIC_VS2_VOTER		= 0x18aa,
 	PMIC_VS2_VOTER_CFG	= 0x18b0,
 	PMIC_VS2_ELR0		= 0x18b4,
+	PMIC_VPA_CON0		= 0x1908,
+	PMIC_VPA_CON1		= 0x190e,
+	PMIC_VPA_DBG0		= 0x1914,
 	PMIC_BUCK_VPA_DLC_CON0	= 0x1918,
 	PMIC_BUCK_VPA_DLC_CON1	= 0x191a,
+	PMIC_VSIM1_CON0		= 0x1cd0,
 	PMIC_VSRAM_PROC1_ELR	= 0x1b44,
 	PMIC_VSRAM_PROC2_ELR	= 0x1b46,
 	PMIC_VSRAM_PROC1_VOSEL1	= 0x1e90,
 	PMIC_VSRAM_PROC2_VOSEL1	= 0x1eb0,
+	PMIC_VSIM1_ANA_CON0	= 0x1fa2,
 	PMIC_VM18_ANA_CON0	= 0x2020,
 };
 
@@ -53,9 +58,15 @@ enum {
 	MT6359P_SRAM_PROC1,
 	MT6359P_SRAM_PROC2,
 	MT6359P_CORE,
+	MT6359P_PA,
+	MT6359P_SIM1,
 	MT6359P_MAX,
 };
 
+#define VSIM1_VOL_REG_SHIFT  8
+#define VSIM1_VOL_OFFSET_1 1400
+#define VSIM1_VOL_OFFSET_2 1900
+
 #define VM18_VOL_REG_SHIFT  8
 #define VM18_VOL_OFFSET 600
 
@@ -69,6 +80,10 @@ void mt6359p_buck_set_voltage(u32 buck_id, u32 buck_uv);
 u32 mt6359p_buck_get_voltage(u32 buck_id);
 void mt6359p_set_vm18_voltage(u32 vm18_uv);
 u32 mt6359p_get_vm18_voltage(void);
+void mt6359p_set_vsim1_voltage(u32 vsim1_uv);
+u32 mt6359p_get_vsim1_voltage(void);
+void mt6359p_enable_vpa(bool enable);
+void mt6359p_enable_vsim1(bool enable);
 void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift);
 void pmic_init_setting(void);
 void pmic_lp_setting(void);
diff --git a/src/soc/mediatek/common/mt6359p.c b/src/soc/mediatek/common/mt6359p.c
index 5a87c0d8e1..580079ef47 100644
--- a/src/soc/mediatek/common/mt6359p.c
+++ b/src/soc/mediatek/common/mt6359p.c
@@ -159,7 +159,7 @@ static void pmic_wk_vs2_voter_setting(void)
 
 void mt6359p_buck_set_voltage(u32 buck_id, u32 buck_uv)
 {
-	u32 vol_offset, vol_reg, vol;
+	u32 vol_offset, vol_reg, vol, vol_step;
 
 	if (!pmif_arb)
 		die("ERROR: pmif_arb not initialized");
@@ -168,31 +168,40 @@ void mt6359p_buck_set_voltage(u32 buck_id, u32 buck_uv)
 	case MT6359P_GPU11:
 		vol_offset = 400000;
 		vol_reg = PMIC_VGPU11_ELR0;
+		vol_step = 6250;
 		break;
 	case MT6359P_SRAM_PROC1:
 		vol_offset = 500000;
 		vol_reg = PMIC_VSRAM_PROC1_ELR;
+		vol_step = 6250;
 		break;
 	case MT6359P_SRAM_PROC2:
 		vol_offset = 500000;
 		vol_reg = PMIC_VSRAM_PROC2_ELR;
+		vol_step = 6250;
 		break;
 	case MT6359P_CORE:
 		vol_offset = 506250;
 		vol_reg = PMIC_VCORE_ELR0;
+		vol_step = 6250;
+		break;
+	case MT6359P_PA:
+		vol_offset = 500000;
+		vol_reg = PMIC_VPA_CON1;
+		vol_step = 50000;
 		break;
 	default:
 		die("ERROR: Unknown buck_id %u", buck_id);
 		return;
 	};
 
-	vol = (buck_uv - vol_offset) / 6250;
+	vol = (buck_uv - vol_offset) / vol_step;
 	mt6359p_write_field(vol_reg, vol, 0x7F, 0);
 }
 
 u32 mt6359p_buck_get_voltage(u32 buck_id)
 {
-	u32 vol_shift, vol_offset, vol_reg, vol;
+	u32 vol_shift, vol_offset, vol_reg, vol, vol_step;
 
 	if (!pmif_arb)
 		die("ERROR: pmif_arb not initialized");
@@ -202,21 +211,31 @@ u32 mt6359p_buck_get_voltage(u32 buck_id)
 		vol_shift = 0;
 		vol_offset = 400000;
 		vol_reg = PMIC_VGPU11_DBG0;
+		vol_step = 6250;
 		break;
 	case MT6359P_SRAM_PROC1:
 		vol_shift = 8;
 		vol_offset = 500000;
 		vol_reg = PMIC_VSRAM_PROC1_VOSEL1;
+		vol_step = 6250;
 		break;
 	case MT6359P_SRAM_PROC2:
 		vol_shift = 8;
 		vol_offset = 500000;
 		vol_reg = PMIC_VSRAM_PROC2_VOSEL1;
+		vol_step = 6250;
 		break;
 	case MT6359P_CORE:
 		vol_shift = 0;
 		vol_offset = 506250;
 		vol_reg = PMIC_VCORE_DBG0;
+		vol_step = 6250;
+		break;
+	case MT6359P_PA:
+		vol_shift = 0;
+		vol_offset = 500000;
+		vol_reg = PMIC_VPA_DBG0;
+		vol_step = 50000;
 		break;
 	default:
 		die("ERROR: Unknown buck_id %u", buck_id);
@@ -224,7 +243,7 @@ u32 mt6359p_buck_get_voltage(u32 buck_id)
 	};
 
 	vol = mt6359p_read_field(vol_reg, 0x7F, vol_shift);
-	return vol_offset + vol * 6250;
+	return vol_offset + vol * vol_step;
 }
 
 void mt6359p_set_vm18_voltage(u32 vm18_uv)
@@ -254,6 +273,57 @@ u32 mt6359p_get_vm18_voltage(void)
 	return 1000 * (VM18_VOL_OFFSET + reg_vol + reg_cali);
 }
 
+void mt6359p_set_vsim1_voltage(u32 vsim1_uv)
+{
+	u32 reg_vol, reg_cali;
+
+	if (!pmif_arb)
+		die("ERROR: pmif_arb not initialized");
+
+	if ((vsim1_uv >= 1700000) && (vsim1_uv <= 1900000))
+		reg_vol = (vsim1_uv / 1000 - VSIM1_VOL_OFFSET_1) / 100;
+	else if ((vsim1_uv >= 2700000) && (vsim1_uv <= 2800000))
+		reg_vol = (vsim1_uv / 1000 - VSIM1_VOL_OFFSET_2) / 100;
+	else if ((vsim1_uv >= 3000000) && (vsim1_uv <= 3200000))
+		reg_vol = (vsim1_uv / 1000 - VSIM1_VOL_OFFSET_2) / 100;
+	else
+		die("ERROR: Unknown vsim1 voltage %u", vsim1_uv);
+
+	reg_cali = ((vsim1_uv / 1000) % 100) / 10;
+	mt6359p_write(PMIC_VSIM1_ANA_CON0, (reg_vol << VSIM1_VOL_REG_SHIFT) | reg_cali);
+}
+
+u32 mt6359p_get_vsim1_voltage(void)
+{
+	u32 reg_vol, reg_cali, reg_offset;
+
+	if (!pmif_arb)
+		die("ERROR: pmif_arb not initialized");
+
+	reg_vol = 100 * mt6359p_read_field(PMIC_VSIM1_ANA_CON0, 0xF,
+					   VSIM1_VOL_REG_SHIFT);
+	reg_cali = 10 * mt6359p_read_field(PMIC_VSIM1_ANA_CON0, 0xF, 0);
+
+	if ((reg_vol == 300) || (reg_vol == 400))
+		reg_offset = VSIM1_VOL_OFFSET_1;
+	else if ((reg_vol == 800) || (reg_vol == 1100) || (reg_vol == 1200))
+		reg_offset = VSIM1_VOL_OFFSET_2;
+	else
+		die("ERROR: Unknown vsim1 reg_vol %x", reg_vol);
+
+	return 1000 * (reg_offset + reg_vol + reg_cali);
+}
+
+void mt6359p_enable_vpa(bool enable)
+{
+	mt6359p_write_field(PMIC_VPA_CON0, !!enable, 0x1, 0);
+}
+
+void mt6359p_enable_vsim1(bool enable)
+{
+	mt6359p_write_field(PMIC_VSIM1_CON0, !!enable, 0x1, 0);
+}
+
 static void init_pmif_arb(void)
 {
 	if (!pmif_arb) {
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc
index 78d13a5768..4be7b4a546 100644
--- a/src/soc/mediatek/mt8188/Makefile.inc
+++ b/src/soc/mediatek/mt8188/Makefile.inc
@@ -23,6 +23,9 @@ romstage-y += ../common/pmif_spmi.c pmif_spmi.c
 
 ramstage-y += emi.c
 ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
+ramstage-y += ../common/mt6359p.c mt6359p.c
+ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
+ramstage-y += ../common/pmif_spi.c pmif_spi.c
 ramstage-y += soc.c
 ramstage-y += ../common/usb.c usb.c