diff options
| author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-02-01 10:07:12 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-10 14:27:29 +0000 |
| commit | 8ad51a8abfbda76237141230cf73a6b572620a06 (patch) | |
| tree | bf93796a34eb05bcf8da720444702716f59d1864 | |
| parent | c585d8c96cf8cecec2239087c803323616242163 (diff) | |
mb/intel/adlrvp: Fix vbt loading error
When booting ADL RVP, coreboot is unable to load VBT binary as
makefile will rename VBT binary to "vbt.bin" when building
coreboot.rom.
The reason for having this function is that chromeOS has emerge
tool to streamline the VBT stitching process to support multiple
VBTs for different RVP boards; while we only need 1 vbt for generic
non-chromeOS usage. Hence add a chomeos kconfig to guard this.
TEST=Able to boot ADL RVP DDR5 with DP display.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I5f6f9554b75f4d62198aac9938e65c71c3e7cee9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
| -rw-r--r-- | src/mainboard/intel/adlrvp/mainboard.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c index f929b10d77..d988fac7dd 100644 --- a/src/mainboard/intel/adlrvp/mainboard.c +++ b/src/mainboard/intel/adlrvp/mainboard.c @@ -68,6 +68,9 @@ struct chip_operations mainboard_ops = { const char *mainboard_vbt_filename(void) { + if (!CONFIG(CHROMEOS)) + return "vbt.bin"; + uint8_t sku_id = get_board_id(); switch (sku_id) { case ADL_P_LP5_1: |