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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-27 17:59:58 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-11-16 10:56:47 +0000
commit8a5283ab1b18614c4df7f2e9e194ad058ba7e29f (patch)
tree7efcd1ed4d84bcb40a85aaba12dd48c5610eb6ce
parent55d6238fa6cd6297a4bad5c34b6618d52e848618 (diff)
src: Remove unneeded include <cbmem.h>
Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29302 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/arch/arm/armv7/mmu.c1
-rw-r--r--src/arch/arm64/arm_tf.c1
-rw-r--r--src/arch/arm64/boot.c1
-rw-r--r--src/cpu/allwinner/a10/cpu.c1
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c1
-rw-r--r--src/drivers/amd/agesa/state_machine.c1
-rw-r--r--src/drivers/intel/fsp1_1/hob.c1
-rw-r--r--src/drivers/intel/fsp1_1/ramstage.c1
-rw-r--r--src/mainboard/google/slippy/acpi_tables.c1
-rw-r--r--src/mainboard/via/epia-m850/romstage.c1
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/00630F01/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/00660F01/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c1
-rw-r--r--src/northbridge/intel/e7505/northbridge.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/fsp_rangeley/northbridge.c1
-rw-r--r--src/northbridge/intel/fsp_sandybridge/northbridge.c1
-rw-r--r--src/northbridge/intel/fsp_sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/gm45/acpi.c1
-rw-r--r--src/northbridge/intel/haswell/northbridge.c1
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c1
-rw-r--r--src/northbridge/intel/i945/acpi.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
-rw-r--r--src/northbridge/intel/nehalem/northbridge.c1
-rw-r--r--src/northbridge/intel/sandybridge/early_init.c1
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c1
-rw-r--r--src/northbridge/intel/x4x/acpi.c1
-rw-r--r--src/northbridge/intel/x4x/early_init.c1
-rw-r--r--src/northbridge/via/vx900/early_vx900.h1
-rw-r--r--src/northbridge/via/vx900/northbridge.c1
-rw-r--r--src/security/vboot/vboot_loader.c1
-rw-r--r--src/soc/amd/common/block/s3/s3_resume.c1
-rw-r--r--src/soc/intel/braswell/southcluster.c1
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c1
-rw-r--r--src/soc/intel/broadwell/systemagent.c1
-rw-r--r--src/soc/intel/cannonlake/romstage/power_state.c1
-rw-r--r--src/soc/intel/denverton_ns/chip.c1
-rw-r--r--src/soc/intel/denverton_ns/systemagent.c1
-rw-r--r--src/soc/intel/fsp_baytrail/southcluster.c1
-rw-r--r--src/soc/intel/icelake/romstage/power_state.c1
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c1
-rw-r--r--src/soc/nvidia/tegra124/display.c1
-rw-r--r--src/soc/nvidia/tegra124/sor.c1
-rw-r--r--src/soc/nvidia/tegra210/soc.c1
-rw-r--r--src/soc/nvidia/tegra210/sor.c1
-rw-r--r--src/soc/rockchip/rk3288/soc.c1
-rw-r--r--src/soc/samsung/exynos5250/cpu.c1
-rw-r--r--src/soc/samsung/exynos5420/cpu.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/cfg.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/lpc.c1
-rw-r--r--src/southbridge/amd/pi/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.c1
-rw-r--r--src/southbridge/amd/sb700/lpc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
60 files changed, 1 insertions, 59 deletions
diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index 935f778ec5..b63497ce8f 100644
--- a/src/arch/arm/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
@@ -33,7 +33,6 @@
#include <stdint.h>
#include <symbols.h>
-#include <cbmem.h>
#include <console/console.h>
#include <arch/cache.h>
diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c
index 384b1b724e..eaf873965f 100644
--- a/src/arch/arm64/arm_tf.c
+++ b/src/arch/arm64/arm_tf.c
@@ -20,7 +20,6 @@
#include <arm_tf.h>
#include <assert.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <program_loading.h>
/*
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index 65a01bf562..54a33e0daf 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -18,7 +18,6 @@
#include <arch/stages.h>
#include <arch/transition.h>
#include <arm_tf.h>
-#include <cbmem.h>
#include <program_loading.h>
#include <rules.h>
#include <string.h>
diff --git a/src/cpu/allwinner/a10/cpu.c b/src/cpu/allwinner/a10/cpu.c
index c1455be1e6..09f67662bf 100644
--- a/src/cpu/allwinner/a10/cpu.c
+++ b/src/cpu/allwinner/a10/cpu.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include <cbmem.h>
#include <symbols.h>
static void cpu_enable_resources(struct device *dev)
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index adf959ce4f..e55ef408f3 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -26,7 +26,6 @@
#include <cpu/amd/msr.h>
#include <arch/acpi.h>
#include <romstage_handoff.h>
-#include <cbmem.h>
#include "cpu/amd/car/disable_cache_as_ram.c"
diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c
index 8fcc60af68..15ea211f4b 100644
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -21,7 +21,6 @@
#include <arch/cpu.h>
#include <bootstate.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
index 40881d632a..ee1a6a328e 100644
--- a/src/drivers/intel/fsp1_1/hob.c
+++ b/src/drivers/intel/fsp1_1/hob.c
@@ -17,7 +17,6 @@
#include <arch/early_variables.h>
#include <arch/hlt.h>
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <fsp/util.h>
#include <ip_checksum.h>
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index bfc58f865c..864ab4509f 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -16,7 +16,6 @@
#include <bootmode.h>
#include <arch/acpi.h>
-#include <cbmem.h>
#include <console/console.h>
#include <fsp/memmap.h>
#include <fsp/ramstage.h>
diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c
index 51c5b965c5..b17f5a6296 100644
--- a/src/mainboard/google/slippy/acpi_tables.c
+++ b/src/mainboard/google/slippy/acpi_tables.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <cbmem.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <arch/acpigen.h>
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index db03103b0e..dd303b7b87 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -27,6 +27,7 @@
#include <cpu/x86/bist.h>
#include <string.h>
#include <timestamp.h>
+#include <cbmem.h>
#include <northbridge/via/vx900/early_vx900.h>
#include <northbridge/via/vx900/raminit.h>
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 1851118645..ff011e3608 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 0a56d18e73..b843c799c2 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 7248eb79a0..0361a77eb7 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <AGESA.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index a42ee5cd51..b3b0ba192a 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index 7a24d11a65..8166046a88 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index 826ce3ea41..8dd9daaee0 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 804ce6eab5..4d9fc280b2 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index a5dc6cdf32..b4752c4c52 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -20,7 +20,6 @@
#include <stdlib.h>
#include <string.h>
#include "e7505.h"
-#include <cbmem.h>
#include <arch/acpi.h>
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index eadd5bca8a..8a44b271b4 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -37,7 +37,6 @@
#include <assert.h>
#include <spd.h>
#include <sdram_mode.h>
-#include <cbmem.h>
#include "raminit.h"
#include "e7505.h"
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 94855cfc40..93d9c63421 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index 111c201097..c468e25752 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
#include <fsp_util.h>
diff --git a/src/northbridge/intel/fsp_sandybridge/raminit.c b/src/northbridge/intel/fsp_sandybridge/raminit.c
index f67d405224..a9648ed302 100644
--- a/src/northbridge/intel/fsp_sandybridge/raminit.c
+++ b/src/northbridge/intel/fsp_sandybridge/raminit.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <string.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <device/pci_def.h>
#include "raminit.h"
#include "northbridge.h"
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 019c5ffdec..673478c8fc 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -22,7 +22,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include "gm45.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 0ca071b9ce..42e1501cff 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <cpu/x86/smm.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include "chip.h"
#include "haswell.h"
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 71b55041b3..4b1141c7ff 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "i440bx.h"
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index dd080118fb..0ce7e4b950 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -21,7 +21,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include "i945.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index ed93daa851..30e16dbb48 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -26,7 +26,6 @@
#include "raminit.h"
#include "i945.h"
#include "chip.h"
-#include <cbmem.h>
#include <device/dram/ddr2.h>
#include <timestamp.h>
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 4c6cdd4d73..00f6913a07 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -28,7 +28,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "nehalem.h"
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 7b4b3bed27..f8ecc1a77a 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <device/pci_def.h>
#include <elog.h>
-#include <cbmem.h>
#include <pc80/mc146818rtc.h>
#include <romstage_handoff.h>
#include "sandybridge.h"
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index cb0e5db455..5ec8292f62 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "sandybridge.h"
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index c5c31e6599..0f235a4bb4 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -23,7 +23,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include "x4x.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index d410259d82..c6eb38315b 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -24,7 +24,6 @@
#endif
#include <pc80/mc146818rtc.h>
#include "x4x.h"
-#include <cbmem.h>
#include <console/console.h>
#include <halt.h>
#include <romstage_handoff.h>
diff --git a/src/northbridge/via/vx900/early_vx900.h b/src/northbridge/via/vx900/early_vx900.h
index 55b6c69766..899512b90c 100644
--- a/src/northbridge/via/vx900/early_vx900.h
+++ b/src/northbridge/via/vx900/early_vx900.h
@@ -21,7 +21,6 @@
#include "vx900.h"
#include <arch/io.h>
-#include <cbmem.h>
#include <stdint.h>
/* North Module devices */
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index 2b81b47ff2..ca414506df 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -22,7 +22,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cf9_reset.h>
#include <reset.h>
#include <string.h>
diff --git a/src/security/vboot/vboot_loader.c b/src/security/vboot/vboot_loader.c
index 17ea0a9401..57a3b4985f 100644
--- a/src/security/vboot/vboot_loader.c
+++ b/src/security/vboot/vboot_loader.c
@@ -15,7 +15,6 @@
#include <arch/early_variables.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <rmodule.h>
diff --git a/src/soc/amd/common/block/s3/s3_resume.c b/src/soc/amd/common/block/s3/s3_resume.c
index 1ba9468e35..04414e8a2e 100644
--- a/src/soc/amd/common/block/s3/s3_resume.c
+++ b/src/soc/amd/common/block/s3/s3_resume.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbmem.h>
#include <stage_cache.h>
#include <mrc_cache.h>
#include <console/console.h>
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index dd0c78e59a..ae4b8c5057 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <bootstate.h>
-#include <cbmem.h>
#include "chip.h"
#include <console/console.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index b15057484c..7a796f4a69 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -20,7 +20,6 @@
#include <arch/early_variables.h>
#include <bootmode.h>
#include <console/console.h>
-#include <cbmem.h>
#include <cpu/x86/mtrr.h>
#include <elog.h>
#include <program_loading.h>
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index afb60380d0..71477508b9 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c
index 838a056a9e..72361ff83a 100644
--- a/src/soc/intel/cannonlake/romstage/power_state.c
+++ b/src/soc/intel/cannonlake/romstage/power_state.c
@@ -16,7 +16,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index dfb6d2ee74..d0a21ac335 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -18,7 +18,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index f41714fb41..6ffa2c70ca 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -25,7 +25,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <romstage_handoff.h>
#include <timer.h>
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index d62805ff7a..21cd0d5f07 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/icelake/romstage/power_state.c b/src/soc/intel/icelake/romstage/power_state.c
index 3b6d5f25de..17ed36a9d9 100644
--- a/src/soc/intel/icelake/romstage/power_state.c
+++ b/src/soc/intel/icelake/romstage/power_state.c
@@ -15,7 +15,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 8710c5a662..b194258228 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -19,7 +19,6 @@
#include <arch/stages.h>
#include <arch/early_variables.h>
#include <assert.h>
-#include <cbmem.h>
#include <chip.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index 061d16747e..2e6696585b 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -15,7 +15,6 @@
#include <arch/io.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index b93b39d83d..50d637057b 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <delay.h>
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index 076aa00553..71532be989 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -18,7 +18,6 @@
#include <arch/cache.h>
#include <bootmode.h>
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <soc/nvidia/tegra/dc.h>
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index 87eb5370d8..604fa0e555 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <string.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra/types.h>
#include <soc/sor.h>
diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c
index eadbfc8ee2..c0a2ed002e 100644
--- a/src/soc/rockchip/rk3288/soc.c
+++ b/src/soc/rockchip/rk3288/soc.c
@@ -15,7 +15,6 @@
#include <arch/cache.h>
#include <bootmode.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/samsung/exynos5250/cpu.c b/src/soc/samsung/exynos5250/cpu.c
index 2196144dd7..aed11146d9 100644
--- a/src/soc/samsung/exynos5250/cpu.c
+++ b/src/soc/samsung/exynos5250/cpu.c
@@ -15,7 +15,6 @@
*/
#include <arch/cache.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c
index cab23a60e6..ecda54b150 100644
--- a/src/soc/samsung/exynos5420/cpu.c
+++ b/src/soc/samsung/exynos5420/cpu.c
@@ -15,7 +15,6 @@
*/
#include <arch/cache.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c
index 66cd66ebe3..af0cb58f6c 100644
--- a/src/southbridge/amd/agesa/hudson/early_setup.c
+++ b/src/southbridge/amd/agesa/hudson/early_setup.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
-#include <cbmem.h>
#include "hudson.h"
void hudson_pci_port80(void)
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 4fc473bdf4..5d32a83d91 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <cbmem.h>
#include "hudson.h"
#include "imc.h"
#include "smbus.h"
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index f2cd9a9021..10272166d0 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -16,7 +16,6 @@
#include "SBPLATFORM.h"
#include "cfg.h"
#include <OEM.h>
-#include <cbmem.h>
#include <arch/io.h>
#include <arch/acpi.h>
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 40c0739bb1..2759af6488 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -20,7 +20,6 @@
#include <arch/ioapic.h>
#include "lpc.h"
#include <arch/io.h>
-#include <cbmem.h>
void lpc_read_resources(struct device *dev)
{
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index c38e6f8d69..07c4519182 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -22,7 +22,6 @@
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
-#include <cbmem.h>
#include "hudson.h"
#include "pci_devs.h"
#include <Fch/Fch.h>
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index ecf041aaae..bf9cad0faf 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <cbmem.h>
#include "hudson.h"
#include "smbus.h"
#include "smi.h"
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 6569e39b20..857503a7ed 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -28,7 +28,6 @@
#include <pc80/isa-dma.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <cbmem.h>
#include <cpu/amd/powernow.h>
#include "sb700.h"
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index aa69981361..c3422419df 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <arch/cbfs.h>
#include <ip_checksum.h>
#include <pc80/mc146818rtc.h>