diff options
| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2021-11-15 14:50:31 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-18 23:32:22 +0000 |
| commit | 88295c35cc06bc0650111d2f92e0b7235b7164b0 (patch) | |
| tree | a98eea90ab614d623681fae4ac2299907b862d92 | |
| parent | da815303a3279e23e13873f2caec2695ffbe36a0 (diff) | |
mb/google/brya/var/gimble: Include 2 new SPDs
Add SPD support to gimble for LPDDR4 memory part MT53E1G32D2NP-046 WT:B
and MT53E512M32D1NP-046 WT:B.
BUG=b:191574298
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: Id3fc35605675b953bf993a29f35140f7721eedab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59299
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
3 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc index 187d4c9697..9db94849fc 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc @@ -4,6 +4,6 @@ # util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/gimble/memory src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR -SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR +SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B +SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B SPD_SOURCES += spd/lp4x/set-0/spd-4.hex # ID = 2(0b0010) Parts = MT53E1G32D2NP-046 WT:A diff --git a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt index 02c1019fe7..c3a1347f74 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt @@ -10,3 +10,5 @@ H9HCNNNBKMMLXR-NEE 0 (0000) MT53E1G32D2NP-046 WT:A 2 (0010) K4U6E3S4AA-MGCR 0 (0000) K4UBE3D4AA-MGCR 1 (0001) +MT53E512M32D1NP-046 WT:B 0 (0000) +MT53E1G32D2NP-046 WT:B 1 (0001) diff --git a/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt index 7cb0e233af..568e7246a4 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt @@ -4,3 +4,5 @@ H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A K4U6E3S4AA-MGCR K4UBE3D4AA-MGCR +MT53E512M32D1NP-046 WT:B +MT53E1G32D2NP-046 WT:B |