diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2024-03-05 10:00:21 -0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-03-08 16:59:10 +0000 |
| commit | 7eb014eba23b2141f262b7c7ba0172f16c759baa (patch) | |
| tree | 326b32be3e6d32d8f01c428fbe36e06bbcd5aa78 | |
| parent | cee8eb25c8bbf9b0477dd0861df53a5dd4d0748d (diff) | |
drivers/intel/fsp2_0: Add "silicon" to the multiphase callback name
The `platform_fsp_multi_phase_init_cb' callback is specific to FSP-S,
let's rename it 'platform_fsp_silicon_multi_phase_init_cb' to avoid
any confusion.
Change-Id: I86b69e2069f08023e6f48464f6df4593710aa9ee
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
| -rw-r--r-- | src/drivers/intel/fsp2_0/include/fsp/api.h | 2 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index c035452e05..40a64e68c8 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -48,7 +48,7 @@ void fsps_load(void); void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version); void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd); /* Callbacks for SoC/Mainboard specific overrides */ -void platform_fsp_multi_phase_init_cb(uint32_t phase_index); +void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index); /* Check if MultiPhase Si Init is enabled */ bool fsp_is_multi_phase_init_enabled(void); /* diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index e543628987..4be4b61c84 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -27,7 +27,7 @@ struct fsp_multi_phase_get_number_of_phases_params { }; /* Callbacks for SoC/Mainboard specific overrides */ -void __weak platform_fsp_multi_phase_init_cb(uint32_t phase_index) +void __weak platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index) { /* Leave for the SoC/Mainboard to implement if necessary. */ } @@ -190,7 +190,7 @@ static void do_silicon_init(struct fsp_header *hdr) * Give SoC/mainboard a chance to perform any operation before * Multi Phase Execution */ - platform_fsp_multi_phase_init_cb(i); + platform_fsp_silicon_multi_phase_init_cb(i); multi_phase_params.multi_phase_action = EXECUTE_PHASE; multi_phase_params.phase_index = i; diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index b43203038f..46555b0719 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -1342,7 +1342,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) * 1 | After TCSS initialization completed | for TCSS specific init * 2 | Before BIOS Reset CPL is set by FSP-S | for CPU specific init */ -void platform_fsp_multi_phase_init_cb(uint32_t phase_index) +void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index) { switch (phase_index) { case 1: diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 971fa3360d..a02d4b99c6 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -838,7 +838,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) * 1 | After TCSS initialization completed | for TCSS specific init * 2 | Before BIOS Reset CPL is set by FSP-S | for CPU specific init */ -void platform_fsp_multi_phase_init_cb(uint32_t phase_index) +void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index) { switch (phase_index) { case 1: diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 358536ea43..33269356c8 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -659,7 +659,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) * ------- + ------------------------------------------------ + ------------------------------- * 1 | After TCSS initialization completed | for TCSS specific init */ -void platform_fsp_multi_phase_init_cb(uint32_t phase_index) +void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index) { switch (phase_index) { case 1: |