diff options
author | Kangheui Won <khwon@chromium.org> | 2022-01-25 18:55:04 +1100 |
---|---|---|
committer | Raul Rangel <rrangel@chromium.org> | 2022-02-01 22:32:18 +0000 |
commit | 7e91db714853fcc55b1bc63707f1618908bbf8dd (patch) | |
tree | 31b08cddb00fa4ec9bf00231125e6a14881148f0 | |
parent | 506ca3ef4e78d3b32cddfe81eeaa10af86fd57b6 (diff) |
psp_verstage: report developer mode to PSP
Add platform_report_mode function which report current developer mode
status to the PSP. L1 widevine app in the PSP will use this information
to select key box.
BUG=b:211058864
TEST=build and boot guybrush
TEST=build picasso chrome os boards
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: I04b5fcfa338b485b36f1b946203f32823385c0b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
-rw-r--r-- | src/soc/amd/cezanne/psp_verstage/chipset.c | 8 | ||||
-rw-r--r-- | src/soc/amd/common/psp_verstage/include/psp_verstage.h | 1 | ||||
-rw-r--r-- | src/soc/amd/common/psp_verstage/psp_verstage.c | 2 | ||||
-rw-r--r-- | src/soc/amd/picasso/psp_verstage/chipset.c | 6 |
4 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c index 183f1169cd..30f613a492 100644 --- a/src/soc/amd/cezanne/psp_verstage/chipset.c +++ b/src/soc/amd/cezanne/psp_verstage/chipset.c @@ -33,6 +33,14 @@ int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, return 0; } +void platform_report_mode(int developer_mode_enabled) +{ + if (developer_mode_enabled) + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_DEVELOPER); + else + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_PRODUCTION); +} + /* Functions below are stub functions for not-yet-implemented PSP features. * These functions should be replaced with proper implementations later. diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h index 606b6a69cd..2e3b12fd31 100644 --- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h +++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h @@ -65,5 +65,6 @@ uint32_t save_uapp_data(void *address, uint32_t size); uint32_t get_bios_dir_addr(struct embedded_firmware *ef_table); int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, struct sha_generic_data *sha_op); +void platform_report_mode(int developer_mode_enabled); #endif /* PSP_VERSTAGE_H */ diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 05c14d6808..9f347009a2 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -314,6 +314,8 @@ void Main(void) if (retval) reboot_into_recovery(ctx, retval); + platform_report_mode(vboot_developer_mode_enabled()); + post_code(POSTCODE_UPDATE_BOOT_REGION); /* diff --git a/src/soc/amd/picasso/psp_verstage/chipset.c b/src/soc/amd/picasso/psp_verstage/chipset.c index 9577a5b632..4bdb873b17 100644 --- a/src/soc/amd/picasso/psp_verstage/chipset.c +++ b/src/soc/amd/picasso/psp_verstage/chipset.c @@ -38,3 +38,9 @@ int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, } return 0; } + +void platform_report_mode(int developer_mode_enabled) +{ + /* Picasso PSP doesn't support this */ + (void)developer_mode_enabled; +} |