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authorKun Liu <liukun11@huaqin.corp-partner.google.com>2023-10-08 15:29:30 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-10-10 13:38:03 +0000
commit7c193b9480eaa0692b4d68ed768262ff34ae35e6 (patch)
tree9cdb9f8b69ecffebcf577704338d8849c7953d72
parent639d6c7c1789d37f26252bb7ea9e9d5bf3c6d09f (diff)
mb/google/rex/var/screebo: Update DTT settings for thermal control
update DTT settings for thermal control, as follows: 1.Cancel TCPU trip point and fine tune other protection temperature on the Critical policy table 2.Fine tune EC/Bios protection temperature BUG=b:291217859 TEST=emerge-rex coreboot Change-Id: I0e2ff6eea9fed71ad7680c1fac4921984b87aca5 Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78290 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: zhongtian wu <wuzhongtian@huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/rex/variants/screebo/overridetree.cb16
1 files changed, 6 insertions, 10 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index f5f491f258..f2a9e5598a 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -147,7 +147,6 @@ chip soc/intel/meteorlake
TEMP_PCT(60, 60),
TEMP_PCT(55, 50),
TEMP_PCT(50, 40),
- TEMP_PCT(45, 30),
}
},
[1] = {
@@ -159,7 +158,6 @@ chip soc/intel/meteorlake
TEMP_PCT(60, 60),
TEMP_PCT(55, 50),
TEMP_PCT(50, 40),
- TEMP_PCT(45, 30),
}
},
[2] = {
@@ -194,19 +192,17 @@ chip soc/intel/meteorlake
## Passive Policy
# TODO: below values are initial reference values only
register "policies.passive" = "{
- [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
- [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
- [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000),
- [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 85, 5000),
+ [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000),
+ [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 5000),
}"
## Critical Policy
# TODO: below values are initial reference values only
register "policies.critical" = "{
- [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
- [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN),
- [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
- [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN),
+ [0] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN),
}"
## Power Limits Control