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authorZheng Bao <fishbaozi@gmail.com>2021-03-16 16:13:56 +0800
committerMartin Roth <martinroth@google.com>2021-03-22 03:44:30 +0000
commit7b13e4ef2a874aa28ec479824f5ef0e125b338bc (patch)
treeee085eca84de7737bedb12cf02120a34de67bbc2
parentb0f00ed4268573269c5f2085da1c92566768ece3 (diff)
soc/amd/cezanne: Initialize I2C
Add I2C initialization in romstage and ramstage. TEST=To test the I2C connection on Majolica, which doesn't have SPD connection, call the function below after i2c_soc_init is called. i2c_read_bytes(2, 0x4d, addr, data, 1);/* Read out 1 byte one time */ It can get the register values of TMP432B. Or /* Override EC port in ec.h */ #define EC_DATA 0x662 #define EC_SC 0x666 ec_write(0xA9, 0x40); i2c_read_bytes(1, 0x10, addr, data, 2);/* Read out 2 bytes one time */ It can get the register values of CM32181A3OP(ALS). Change-Id: I3a2a1494b44b68e8d8204fba0c90e769e0256e6f Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51029 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/cezanne/Kconfig5
-rw-r--r--src/soc/amd/cezanne/early_fch.c1
-rw-r--r--src/soc/amd/cezanne/fch.c3
3 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 119889db36..7a69cc7f5e 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -16,6 +16,7 @@ config SOC_SPECIFIC_OPTIONS
select ARCH_RAMSTAGE_X86_32
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
select DRIVERS_USB_ACPI
+ select DRIVERS_I2C_DESIGNWARE
select DRIVERS_USB_PCI_XHCI
select FSP_COMPRESS_FSP_M_LZMA
select FSP_COMPRESS_FSP_S_LZMA
@@ -189,6 +190,10 @@ config SMM_MODULE_STACK_SIZE
hex
default 0x800
+config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
+ int
+ default 150
+
menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 0bab87ff8a..b00f49dd97 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -58,6 +58,7 @@ void fch_pre_init(void)
void fch_early_init(void)
{
fch_print_pmxc0_status();
+ i2c_soc_early_init();
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
espi_setup();
diff --git a/src/soc/amd/cezanne/fch.c b/src/soc/amd/cezanne/fch.c
index a3006de259..ce7ff6d315 100644
--- a/src/soc/amd/cezanne/fch.c
+++ b/src/soc/amd/cezanne/fch.c
@@ -6,8 +6,10 @@
#include <assert.h>
#include <bootstate.h>
#include <cpu/x86/smm.h>
+#include <amdblocks/i2c.h>
#include <soc/amd_pci_int_defs.h>
#include <soc/iomap.h>
+#include <soc/i2c.h>
#include <soc/smi.h>
#include <soc/southbridge.h>
@@ -111,6 +113,7 @@ static void fch_init_acpi_ports(void)
void fch_init(void *chip_info)
{
+ i2c_soc_init();
fch_init_acpi_ports();
}