diff options
| author | Jon Murphy <jpmurphy@google.com> | 2023-03-29 15:27:56 -0600 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-04-10 01:12:36 +0000 |
| commit | 7af504b03f0d2987abdde9289095d5a46e6896b9 (patch) | |
| tree | 83b3938fa362a734e3e6094696368f0e8d4f6753 | |
| parent | 22046dd229f8dc39cfa293066611f34e57543fcf (diff) | |
mb/google/myst: Declare CrOS GPIOs
Declare CrOS GPIOs for Myst, add relevant defines needed by chromeOS for
additional control GPIOs.
BUG=b:270616013
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: Ie876883d6ee2e3bc6324c038cefee12d99702dc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74096
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/myst/chromeos.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/myst/variants/baseboard/include/baseboard/gpio.h | 5 |
2 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/chromeos.c b/src/mainboard/google/myst/chromeos.c new file mode 100644 index 0000000000..9f4a3cb05b --- /dev/null +++ b/src/mainboard/google/myst/chromeos.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> + +static const struct cros_gpio cros_gpios[] = { + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_DEVICE_NAME), + CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), +}; +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/myst/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/myst/variants/baseboard/include/baseboard/gpio.h index b94afac4bf..a6683fd286 100644 --- a/src/mainboard/google/myst/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/myst/variants/baseboard/include/baseboard/gpio.h @@ -3,4 +3,9 @@ #ifndef __BASEBOARD_GPIO_H__ #define __BASEBOARD_GPIO_H__ +#include <gpio.h> + +/* SPI Write protect */ +#define CROS_WP_GPIO GPIO_139 + #endif /* __BASEBOARD_GPIO_H__ */ |