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authorRonald G. Minnich <rminnich@gmail.com>2012-11-29 16:28:21 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-11-30 19:02:58 +0100
commit78a1667cbc0a26c09079c81aa7b8f4387c5f3774 (patch)
tree4af041c0cae57bd09eb6d03906a282fc440a2992
parent3665ace13de68e798de31499197cc600d2426967 (diff)
Create a a new configuration variable for PCI
Not all architectures have PCI. This new config variable allows control of whether PCI support is configued in. It is selected for ARCH_X86. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Change-Id: Ic5fe777b14fd6a16ba605ada1e22acf3e8a2c783 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1947 Tested-by: build bot (Jenkins)
-rw-r--r--src/Kconfig5
-rw-r--r--src/devices/Kconfig10
-rw-r--r--src/devices/Makefile.inc8
-rw-r--r--src/devices/pci_device.c20
4 files changed, 29 insertions, 14 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 6bb8135eed..29731b349c 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -203,6 +203,11 @@ source src/mainboard/Kconfig
config ARCH_X86
bool
default n
+ select PCI
+
+config ARCH_ARM
+ bool
+ default n
config ARCH_ARMV7
bool
diff --git a/src/devices/Kconfig b/src/devices/Kconfig
index 72e8a53aa0..700516b902 100644
--- a/src/devices/Kconfig
+++ b/src/devices/Kconfig
@@ -175,28 +175,38 @@ config MULTIPLE_VGA_ADAPTERS
bool
default n
+config PCI
+ bool
+ default n
+
config PCI_64BIT_PREF_MEM
bool
+ depends on PCI
default n
config HYPERTRANSPORT_PLUGIN_SUPPORT
bool
+ depends on PCI
default n
config PCIX_PLUGIN_SUPPORT
bool
+ depends on PCI
default y
config PCIEXP_PLUGIN_SUPPORT
bool
+ depends on PCI
default y
config AGP_PLUGIN_SUPPORT
bool
+ depends on PCI
default y
config CARDBUS_PLUGIN_SUPPORT
bool
+ depends on PCI
default y
config PCIEXP_COMMON_CLOCK
diff --git a/src/devices/Makefile.inc b/src/devices/Makefile.inc
index 9d4b39146c..9fe156ba8c 100644
--- a/src/devices/Makefile.inc
+++ b/src/devices/Makefile.inc
@@ -2,14 +2,14 @@ ramstage-y += device.c
ramstage-y += root_device.c
ramstage-y += cpu_device.c
ramstage-y += device_util.c
-ramstage-y += pci_device.c
+ramstage-$(CONFIG_PCI) += pci_device.c
ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c
ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c
-ramstage-y += pciexp_device.c
+ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c
ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c
ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c
-ramstage-y += pnp_device.c
-ramstage-y += pci_ops.c
+ramstage-$(CONFIG_ARCH_X86) += pnp_device.c
+ramstage-$(CONFIG_PCI) += pci_ops.c
ramstage-y += smbus_ops.c
romstage-y+= device_romstage.c
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index d9e6b27738..ff334fee0e 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -756,11 +756,10 @@ struct device_operations default_pci_ops_bus = {
*/
static struct device_operations *get_pci_bridge_ops(device_t dev)
{
- unsigned int pos;
-
#if CONFIG_PCIX_PLUGIN_SUPPORT
- pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
- if (pos) {
+ unsigned int pcixpos;
+ pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+ if (pcixpos) {
printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev));
return &default_pcix_ops_bus;
}
@@ -769,10 +768,10 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
/* How do I detect a PCI to AGP bridge? */
#endif
#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
- pos = 0;
- while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) {
+ unsigned int htpos = 0;
+ while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) {
u16 flags;
- flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
+ flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS);
if ((flags >> 13) == 1) {
/* Host or Secondary Interface */
printk(BIOS_DEBUG, "%s subordinate bus HT\n",
@@ -782,10 +781,11 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
}
#endif
#if CONFIG_PCIEXP_PLUGIN_SUPPORT
- pos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
- if (pos) {
+ unsigned int pciexpos;
+ pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
+ if (pciexpos) {
u16 flags;
- flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS);
+ flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS);
switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) {
case PCI_EXP_TYPE_ROOT_PORT:
case PCI_EXP_TYPE_UPSTREAM: