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authorPatrick Georgi <pgeorgi@chromium.org>2016-12-15 15:51:13 +0100
committerPatrick Georgi <pgeorgi@google.com>2016-12-16 15:57:56 +0100
commit74add8b70f39801ff522fdc8c34d983e51a5a634 (patch)
tree67141618fe68d88c1d30a9170ed96d39df4106c3
parentda8421d1e2ee715b6ae396d1ab064c4c3f8a77fb (diff)
samsung/exynos5420: Fix test for src < 0
It was unsigned, not a good place to be for testing < 0. Change-Id: I126fe86422900bbae2c3ca16052be27985cfed53 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1241911 Reviewed-on: https://review.coreboot.org/17888 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
-rw-r--r--src/soc/samsung/exynos5420/clock.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c
index 49ac07b115..3c4bb04794 100644
--- a/src/soc/samsung/exynos5420/clock.c
+++ b/src/soc/samsung/exynos5420/clock.c
@@ -161,7 +161,8 @@ static int clock_select_to_pll(enum peripheral_clock_select sel)
unsigned long clock_get_periph_rate(enum periph_id peripheral)
{
unsigned long sclk;
- unsigned int src, div;
+ unsigned int div;
+ int src;
switch (peripheral) {
case PERIPH_ID_UART0: