summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorravindr1 <ravindra@intel.com>2021-03-29 19:41:25 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-05-03 07:41:53 +0000
commit745965763bb59055766a8f1a1662813387890cbb (patch)
treeafadecba3debd8570541a9574f344518de48d4b1
parenta3f7debc89dda5cc42dbd36f64604015f22f2dbd (diff)
soc/intel/alderlake: Enable HWP CPPC support in CB
Kconfig change which enables the hwp cppc acpi support is to get the maximum performance of each CPU to check and enable Intel Turbo Boost Max Technology. BUG=none BRANCH=none TEST=check GCPC and CPC generated in acpi tables for each CPU Change-Id: I5d93774e8025466f1911cf77459910fe872bfcc8 Signed-off-by: ravindr1 <ravindra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51795 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/alderlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 2efe760aac..7480a410e2 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -47,6 +47,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_ACPI
+ select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO
select SOC_INTEL_COMMON_BLOCK_CAR
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG