diff options
author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-03-15 15:54:54 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-18 08:17:20 +0000 |
commit | 73b9fa69309d1ca8438d825eb8b40512c478a180 (patch) | |
tree | d050b933be81c81075aa50ebcf0b6962ac0658d2 | |
parent | d807c806b39d26c24d51ae7542b6f9785070eb2c (diff) |
mb/google/mancomb: Configure eSPI GPIOs in early stage
BUG=b:182211161
TEST=builds
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ifa51705b3b5aab16f9cd2c11084220aafacd2774
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/gpio.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c index 151c673027..effa3f27e0 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c +++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c @@ -108,16 +108,7 @@ static const struct soc_amd_gpio base_gpio_table[] = { /* CLK_REQ0_L */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE), /* GPIO_93 - GPIO_103: Not available */ - /* ESPI1_DATA0 */ - PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE), - /* ESPI1_DATA1 */ - PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE), - /* ESPI1_DATA2 */ - PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE), - /* ESPI1_DATA3 */ - PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE), - /* ESPI_ALERT_L */ - PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), + /* GPIO_104 - GPIO_108: eSPI configured in early stage */ /* EGPIO109 */ PAD_NC(GPIO_109), /* GPIO_110 - GPIO_112: Not available */ @@ -165,7 +156,16 @@ static const struct soc_amd_gpio base_gpio_table[] = { /* Early GPIO configuration */ static const struct soc_amd_gpio early_gpio_table[] = { - /* TODO: Fill early gpio configuration */ + /* ESPI1_DATA0 */ + PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE), + /* ESPI1_DATA1 */ + PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE), + /* ESPI1_DATA2 */ + PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE), + /* ESPI1_DATA3 */ + PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE), + /* ESPI_ALERT_L */ + PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), }; const struct soc_amd_gpio *__weak variant_base_gpio_table(size_t *size) @@ -178,7 +178,6 @@ const struct soc_amd_gpio *__weak variant_override_gpio_table(size_t *size) *size = 0; return NULL; } - const struct soc_amd_gpio *__weak variant_early_gpio_table(size_t *size) { *size = ARRAY_SIZE(early_gpio_table); |