diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-06-16 16:27:04 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-08 22:51:01 +0000 |
commit | 715b9555de6bef2ca3edcf8afd866021447f4b39 (patch) | |
tree | a19dbfa3fc92ed5cd74dfc6f627e9cc26bdab246 | |
parent | 934f683078f736e5409fcef749bf6f27774252c0 (diff) |
mb/asrock/b85m_pro4: Disable PS/2 keyboard wakeup
This results in a wake from S5 as well. Since the PS/2 keyboard now
works, this behavior is annoying and, therefore, undesired.
Change-Id: I180f17c87df23f2a1bbd5c968c64a4b2bc7d9978
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42431
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/asrock/b85m_pro4/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index a5c275d427..a044d0a8a3 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -96,7 +96,6 @@ chip northbridge/intel/haswell irq 0xe0 = 0xff # + GPIO7 direction end device pnp 2e.a on # ACPI - irq 0xe0 = 0x41 # + Enable KBC wakeup irq 0xe4 = 0x10 # + Power RAM in S3 irq 0xf0 = 0x20 end |