diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-24 10:53:19 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2024-04-13 10:53:42 +0000 |
| commit | 6f75dd0fd0c6a9eac570ead978a6da67d8e65aa7 (patch) | |
| tree | b787eaa27b807b7cc6df4c706c32b7a4b2a32fbe | |
| parent | b7341da19133991efd29880849bdaab29a6e243d (diff) | |
sandybridge,haswell,broadwell: Use DIV_ROUND_CLOSEST macro
Integer division in C truncates toward zero. When the dividend and the
divisor are positive, one can add half of the divisor to the dividend to
round the division result towards the closest integer. We already have a
macro in commonlib to do just that, so put it to good use.
Tested with BUILD_TIMELESS=1, coreboot images for the Asus P8Z77-V LX2
and the Asrock B85M Pro4 do not change.
Change-Id: I251af82da15049a3a2aa6ea712ae8c9fe859caf6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52651
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/northbridge/intel/haswell/haswell_mrc/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_shared.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/raminit.c | 3 |
3 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/haswell_mrc/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c index f23e40d8f7..7109e46da0 100644 --- a/src/northbridge/intel/haswell/haswell_mrc/raminit.c +++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c @@ -73,7 +73,7 @@ static void report_memory_config(void) const u32 addr_decoder_common = mchbar_read32(MAD_CHNL); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c index 543d285e9b..8ba20ac6a8 100644 --- a/src/northbridge/intel/sandybridge/raminit_shared.c +++ b/src/northbridge/intel/sandybridge/raminit_shared.c @@ -29,7 +29,7 @@ void report_memory_config(void) printk(BIOS_DEBUG, "memcfg DDR3 ref clock %d MHz\n", refclk); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c index c55e755055..cacf8ecc89 100644 --- a/src/soc/intel/broadwell/raminit.c +++ b/src/soc/intel/broadwell/raminit.c @@ -16,6 +16,7 @@ #include <soc/romstage.h> #include <soc/systemagent.h> #include <timestamp.h> +#include <types.h> static void save_mrc_data(struct pei_data *pei_data) { @@ -46,7 +47,7 @@ static void report_memory_config(void) const u32 addr_decoder_common = mchbar_read32(MAD_CHNL); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, |