diff options
| author | Kane Chen <kane_chen@pegatron.corp-partner.google.com> | 2020-11-25 23:05:18 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-17 06:21:32 +0000 |
| commit | 6c04b353c5d9df899f4fb78294a992902e36e2bd (patch) | |
| tree | 332d0a6a61624d313c55a98ff9ee0ac338489899 | |
| parent | 9ca96f35f792cb14ecbc0eef7bf4166fdf26efce (diff) | |
mb/google/zork: Add GPIO to Shuboz support
1. AGPIO5 to NC
2. EGPIO141 to NC
3. EGPIO144 to NC
BUG=b:174528384
BRANCH=zork
TEST=emerge-zork coreboot
Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I51f291476e01982e1a3f92cd1b338a528434112d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48002
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/zork/variants/shuboz/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/zork/variants/shuboz/gpio.c | 23 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/shuboz/Makefile.inc b/src/mainboard/google/zork/variants/shuboz/Makefile.inc index 295acd25c9..2a8f0f72ed 100644 --- a/src/mainboard/google/zork/variants/shuboz/Makefile.inc +++ b/src/mainboard/google/zork/variants/shuboz/Makefile.inc @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-or-later subdirs-y += ./spd +ramstage-y += gpio.c diff --git a/src/mainboard/google/zork/variants/shuboz/gpio.c b/src/mainboard/google/zork/variants/shuboz/gpio.c new file mode 100644 index 0000000000..0fd867e8d4 --- /dev/null +++ b/src/mainboard/google/zork/variants/shuboz/gpio.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <ec/google/chromeec/ec.h> + +static const struct soc_amd_gpio bid_gpio_set_stage_ram[] = { + /* AGPIO_5 - NC */ + PAD_NC(GPIO_5), + /* EGPIO141 - NC */ + PAD_NC(GPIO_141), + /* EGPIO144 - NC (etk5515 not used) */ + PAD_NC(GPIO_144), +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(bid_gpio_set_stage_ram); + return bid_gpio_set_stage_ram; +} |