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authorPatrick Huang <patrick.huang@amd.corp-partner.google.com>2023-03-22 14:07:47 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-03-27 12:31:53 +0000
commit69bcf763ab05de9d78b02d8ece9715375570c480 (patch)
tree26f690afc2e93a0e3e661bd44acc037c70d67651
parent70ba567117fae7b8804670ea60371f20498227e5 (diff)
mb/google/skyrim: Add UPD usb3_port_force_gen1 for skyrim
Add UPD usb3_port_force_gen1 for skyrim The default setting is set to disable Skyrim -> set default as disable BUG=b:273841155 BRANCH=skyrim TEST=Build, verify the setting will be applied on skyrim. Change-Id: Id53bed82a9fef93b574c3f30830555e02d7f4737 Signed-off-by: Patrick Huang <patrick.huang@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73917 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/mainboard/google/skyrim/variants/skyrim/overridetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
index 512104da4e..eb16120c96 100644
--- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
@@ -32,6 +32,13 @@ chip soc/amd/mendocino
# Remove the sustained_power_limit_mW when STT is enabled
register "sustained_power_limit_mW" = "15000"
+ # set usb3 port force to gen1
+ register "usb3_port_force_gen1" = "{
+ .ports.xhci0_port0 = 0,
+ .ports.xhci1_port0 = 0,
+ .ports.xhci1_port1 = 0,
+ }"
+
device domain 0 on
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref xhci_1 on # XHCI1 controller