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authorHusni Faiz <ahamedhusni73@gmail.com>2022-09-05 15:23:15 +0530
committerMartin L Roth <gaumless@gmail.com>2022-09-16 17:01:17 +0000
commit67300f88cd1e950ca18c4e7bdd770ef18b8c06dd (patch)
tree7f3ede354ef995eba43628e5681d84369f4a958d
parentc5d0761dea84b28cd5993b8775a4559974cc8c04 (diff)
drivers/smbus: add smbus console driver
This patch adds a new smbus console driver and Kconfig options to enable the driver. Change-Id: Ife77fb2c3e1cc77678a4972701317d50624ceb95 Signed-off-by: Husni Faiz <ahamedhusni73@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67339 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/console/Kconfig24
-rw-r--r--src/drivers/smbus/Makefile.inc3
-rw-r--r--src/drivers/smbus/i2c_smbus_console.c14
-rw-r--r--src/include/console/i2c_smbus.h28
4 files changed, 69 insertions, 0 deletions
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 479b7f567e..9b8e9f87c8 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -297,6 +297,30 @@ config CONSOLE_SPI_FLASH_BUFFER_SIZE
value (128K or 0x20000 bytes) is large enough to accommodate
even the BIOS_SPEW level.
+config CONSOLE_I2C_SMBUS
+ bool "SMBus console output"
+ depends on SOUTHBRIDGE_INTEL_COMMON_SMBUS
+ help
+ Send coreboot debug output to the SMBus.
+ The output can be read with an I2C slave device connected
+ the SMBus. Please refer to the technotes section of the
+ coreboot documentation for more details.
+
+if CONSOLE_I2C_SMBUS
+ comment "Set logging device address and data register address"
+
+config CONSOLE_I2C_SMBUS_SLAVE_ADDRESS
+ hex "I2C slave address of the logging device"
+ help
+ I2C address of the device which logs the data.
+
+config CONSOLE_I2C_SMBUS_SLAVE_DATA_REGISTER
+ hex "Data register address of the I2C logging device"
+ help
+ This an 8-bit data register.
+
+endif # CONSOLE_I2C_SMBUS
+
config CONSOLE_QEMU_DEBUGCON
bool "QEMU debug console output"
depends on CPU_QEMU_X86
diff --git a/src/drivers/smbus/Makefile.inc b/src/drivers/smbus/Makefile.inc
new file mode 100644
index 0000000000..e14d59c3e3
--- /dev/null
+++ b/src/drivers/smbus/Makefile.inc
@@ -0,0 +1,3 @@
+ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
+all-y += i2c_smbus_console.c
+endif
diff --git a/src/drivers/smbus/i2c_smbus_console.c b/src/drivers/smbus/i2c_smbus_console.c
new file mode 100644
index 0000000000..c223028a18
--- /dev/null
+++ b/src/drivers/smbus/i2c_smbus_console.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/i2c_smbus.h>
+#include <device/smbus_host.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+void i2c_smbus_console_init(void) {}
+
+void i2c_smbus_console_tx_byte(unsigned char c)
+{
+ do_smbus_write_byte(CONFIG_FIXED_SMBUS_IO_BASE,
+ CONFIG_CONSOLE_I2C_SMBUS_SLAVE_ADDRESS,
+ CONFIG_CONSOLE_I2C_SMBUS_SLAVE_DATA_REGISTER, c);
+}
diff --git a/src/include/console/i2c_smbus.h b/src/include/console/i2c_smbus.h
new file mode 100644
index 0000000000..bea90b6767
--- /dev/null
+++ b/src/include/console/i2c_smbus.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef CONSOLE_I2C_SMBUS_H
+#define CONSOLE_I2C_SMBUS_H
+
+#include <stdint.h>
+
+void i2c_smbus_console_init(void);
+void i2c_smbus_console_tx_byte(unsigned char c);
+
+#define __CONSOLE_SMBUS_ENABLE__ CONFIG(CONSOLE_I2C_SMBUS)
+
+#if __CONSOLE_SMBUS_ENABLE__
+static inline void __i2c_smbus_console_init(void)
+{
+ i2c_smbus_console_init();
+}
+
+static inline void __i2c_smbus_console_tx_byte(u8 data)
+{
+ i2c_smbus_console_tx_byte(data);
+}
+#else
+static inline void __i2c_smbus_console_init(void) {}
+static inline void __i2c_smbus_console_tx_byte(u8 data) {}
+#endif /* __CONSOLE_SMBUS_ENABLE__ */
+
+#endif /* CONSOLE_I2C_SMBUS_H */