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authorChris Ching <chingcodes@chromium.org>2017-12-20 16:07:48 -0700
committerChris Ching <chingcodes@chromium.org>2018-01-23 17:46:11 +0000
commit65d2754e1aaa4e90059b65fac3c00d847e2e465f (patch)
tree54a2f159b015789298721dc90c6d15fb6d242f3c
parentb8d338c467811c9338397216dfda7d80ab5c9137 (diff)
grunt: Enable TPM
Kahlee uses LPC TPM while grunt is using Cr50 connected to I2C. Create the appropriate selection based on selected board, and if grunt then define the I2C address. BUG=b:69416132 BRANCH=none TEST=make all Change-Id: Ia866f80de0164d8cec84e204a5fe93bb53df547f Signed-off-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://review.coreboot.org/22960 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/google/kahlee/Kconfig22
1 files changed, 20 insertions, 2 deletions
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig
index 13c949db8b..69a4d907dd 100644
--- a/src/mainboard/google/kahlee/Kconfig
+++ b/src/mainboard/google/kahlee/Kconfig
@@ -28,7 +28,7 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE
select GFXUMA
select GOOGLE_SMBIOS_MAINBOARD_VERSION
select MAINBOARD_HAS_CHROMEOS
- select MAINBOARD_HAS_LPC_TPM
+ select MAINBOARD_HAS_LPC_TPM if BOARD_GOOGLE_KAHLEE
select SERIRQ_CONTINUOUS_MODE
select STONEYRIDGE_UART
select SOC_AMD_PSP_SELECTABLE_SMU_FW
@@ -101,4 +101,22 @@ config AMD_FWM_POSITION_INDEX
int
default 1
-endif # BOARD_GOOGLE_KAHLEE || BOARD_GOOGLE_GRUNT
+# Select this option to enable use of cr50 I2C TPM on kahlee
+config KAHLEE_USE_I2C_TPM
+ bool
+ default y if !BOARD_GOOGLE_KAHLEE
+ select I2C_TPM
+ select MAINBOARD_HAS_I2C_TPM_CR50
+ select TPM2
+
+config DRIVER_TPM_I2C_BUS
+ hex
+ depends on KAHLEE_USE_I2C_TPM
+ default 0x01
+
+config DRIVER_TPM_I2C_ADDR
+ hex
+ depends on KAHLEE_USE_I2C_TPM
+ default 0x50
+
+endif # BOARD_GOOGLE_BASEBOARD_KAHLEE